公开(公告)号：US12230587B2

公开(公告)日：2025-02-18

申请号：US17706013

申请日：2022-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minjung Choi ,  Yeonjin Lee ,  Jeonil Lee ,  Jongmin Lee

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/58

Abstract: A semiconductor device includes; a semiconductor substrate including a chip area and a scribe lane area, a low-k layer on the semiconductor substrate, an interlayer insulating layer on the low-k layer, a trench area in the scribe lane area, a gap-fill insulating layer in the trench area and vertically extending from the semiconductor substrate through the low-k layer and the interlayer insulating layer to expose an upper surface of the gap-fill insulating layer through the interlayer insulating layer, and a first metal liner covering a side surface of the gap-fill insulating layer and disposed between the gap-fill insulating layer and the low-k layer and between the gap-fill insulating layer and the interlayer insulating layer.

公开(公告)号：US11756843B2

公开(公告)日：2023-09-12

申请号：US17706401

申请日：2022-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjung Choi ,  Junyong Noh ,  Yeonjin Lee ,  Junghoon Han

IPC: H01L21/00 ,  H01L21/66 ,  H01L21/78

CPC classification number: H01L22/34 ,  H01L21/78 ,  H01L22/32

Abstract: A semiconductor device includes a substrate including a first part and a second part, a memory cell disposed on the first part, an insulation layer disposed on the first part and the second part, the insulation layer covering the memory cell, a portion of the insulation layer on the second part including a stepped sidewall, and a first pattern group disposed on the second part and in the portion of the insulation layer and the substrate. A first sidewall of the semiconductor device corresponds to the stepped sidewall including an upper sidewall, a lower sidewall and a connecting surface connecting the upper sidewall to the lower sidewall. The lower sidewall disposed under the upper sidewall is closer to the substrate than the upper sidewall, and has surface roughness different from surface roughness of the upper sidewall.

公开(公告)号：US20230138616A1

公开(公告)日：2023-05-04

申请号：US18051623

申请日：2022-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjung Choi ,  Jongmin Lee ,  Yeonjin Lee ,  Jeonil Lee ,  Jimin Choi

IPC: H01L21/02 ,  H01L23/14 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor device including a semiconductor substrate, a first interlayer insulating layer arranged on the semiconductor substrate, a low dielectric layer arranged on the first interlayer insulating layer, a second interlayer insulating layer and a third interlayer insulating layer sequentially arranged on the low dielectric layer, and a through silicon via penetrating the semiconductor substrate and the first interlayer insulating layer, wherein the semiconductor substrate, the first interlayer insulating layer, and the low dielectric layer constitute a chamfered structure including a first chamfered surface parallel to the top surface of the semiconductor substrate and a second chamfered surface inclined with respect to the top surface of the semiconductor substrate and connected to the first chamfered surface may be provided.

公开(公告)号：US20230080862A1

公开(公告)日：2023-03-16

申请号：US17662301

申请日：2022-05-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjung Choi ,  Jongmin Lee ,  Jimin Choi

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device according to the disclosure includes a substrate, a transistor connected to the substrate, and a wiring structure including contact wirings electrically connected to the transistor. The wiring structure further includes a first wiring insulating layer, a first material layer contacting the first wiring insulating layer, a second material layer contacting the first material layer, and a second wiring insulating layer contacting the second material layer. The first material layer includes SiN, and the second material layer includes SiCN. A dielectric constant of the first wiring insulating layer is greater than a dielectric constant of the second wiring insulating layer.

公开(公告)号：US11557556B2

公开(公告)日：2023-01-17

申请号：US17328365

申请日：2021-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjung Choi ,  Sooho Shin ,  Yeonjin Lee ,  Junghoon Han

IPC: H01L23/00 ,  H01L21/56

Abstract: A semiconductor device includes an interlayer insulating layer disposed on a substrate; a plurality of middle interconnections disposed in the interlayer insulating layer; a pad disposed on the interlayer insulating layer; an upper interconnection disposed on the interlayer insulating layer; a protective insulating layer covering an edge of the pad, the upper interconnection, and a horizontal gap between the pad and the upper interconnection, the protective insulating layer having an opening on the pad; and a bump disposed on the pad, the bump extending on the protective insulating layer and overlapping the upper interconnection from a top-down view. At least one of the plurality of middle interconnections from among middle interconnections vertically closest to the pad has a first vertical thickness, the pad has a second vertical thickness that is twice to 100 times the first vertical thickness, a length of the gap between the pad and the upper interconnection is 1 μm or more, and an upper surface of the protective insulating layer is planar.