Semiconductor device including capacitor with pillar-shaped bottom electrode

    公开(公告)号:US12063772B2

    公开(公告)日:2024-08-13

    申请号:US18215301

    申请日:2023-06-28

    CPC classification number: H10B12/315 H10B12/033

    Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.

    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME

    公开(公告)号:US20210384197A1

    公开(公告)日:2021-12-09

    申请号:US17407836

    申请日:2021-08-20

    Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

    CAPACITOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

    公开(公告)号:US20240387608A1

    公开(公告)日:2024-11-21

    申请号:US18444322

    申请日:2024-02-16

    Abstract: A capacitor may include a primary lower electrode, an interface structure on a surface of the primary lower electrode, a primary dielectric layer including a metal oxide on the interface structure, the primary dielectric layer, and an upper electrode on the primary dielectric layer. The interface structure may include a first interface layer, a second interface layer, and a third interface layer. The first interface layer may have electrical conductivity, and may include a metal oxide doped with a pentavalent element. The second interface layer may be on the first interface layer, and may include a material further doped with nitrogen in the material of the first interface layer. The third interface layer may be on the second interface layer, and may include a metal oxide doped with nitrogen. A metal included in the metal oxide of the third interface layer may include a tetravalent metal.

    Semiconductor memory devices and methods of fabricating the same

    公开(公告)号:US12082395B2

    公开(公告)日:2024-09-03

    申请号:US17407836

    申请日:2021-08-20

    Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

    CAPACITOR AND A DRAM DEVICE INCLUDING THE SAME

    公开(公告)号:US20240164085A1

    公开(公告)日:2024-05-16

    申请号:US18416313

    申请日:2024-01-18

    CPC classification number: H10B12/315 H10B12/033 H10B12/34

    Abstract: A capacitor may include a lower electrode, a dielectric layer structure on the lower electrode, and an upper electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of dielectric layers and at least one insert layer structure between ones of the plurality of dielectric layers. The insert layer structure may include a plurality of zirconium oxide layers and at least one insert layer. The insert layer may be between ones of the plurality of zirconium oxide layers. The capacitor may have a high capacitance and low leakage currents.

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