公开(公告)号：US20210098561A1

公开(公告)日：2021-04-01

申请号：US16885598

申请日：2020-05-28

Applicant: Samsung Display Co., Ltd.

Inventor： Joon Seok PARK ,  Myounghwa KIM ,  Tae Sang KIM ,  Hyungjun KIM ,  Yeon Keon MOON ,  Geunchul PARK ,  Sangwoo SOHN ,  Jun Hyung LIM ,  Kyung Jin JEON ,  Hye Lim CHOI

IPC: H01L27/32

Abstract: A display device includes a first pixel, a second pixel, a first data line connected to the first pixel, and a second data line connected to the second pixel. Each of the first pixel and the second pixel includes a transistor including a conductive layer, a semiconductor layer on the conductive layer, a gate electrode on the semiconductor layer, and a source/drain electrode connected to the semiconductor layer, a capacitor including a first capacitor electrode in a same layer as the gate electrode and a second capacitor electrode on the first capacitor electrode, and a light emitting device on the transistor and the capacitor. The first data line is in a same layer as the source/drain electrode, and the second data line is in a same layer as one of the conductive layer and the second capacitor electrode.

公开(公告)号：US20200243638A1

公开(公告)日：2020-07-30

申请号：US16720230

申请日：2019-12-19

Applicant: Samsung Display Co., Ltd.

Inventor： Sukyoung YANG ,  Sangwoo SOHN ,  Dokeun SONG ,  Dongmin LEE ,  Sangwon SHIN ,  Hyuneok SHIN ,  Kyeong Su KO ,  Sang Gab KIM ,  Joongeol LEE

IPC: H01L27/32

Abstract: A conductive line for a display device may include a first layer including aluminum (Al) or an aluminum alloy, a second layer disposed on the first layer, the second layer including titanium nitride (TiNx), and a third layer disposed on the second layer, the third layer including titanium (Ti) and having a multilayer structure including a plurality of stacked sub-layers.

公开(公告)号：US20130280838A1

公开(公告)日：2013-10-24

申请号：US13716972

申请日：2012-12-17

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SANGWON SHIN ,  Hyunju KANG ,  Sangwoo SOHN ,  Sukyoung YANG ,  Changoh JEONG

IPC: H01L29/66 ,  H01L21/324

CPC classification number: H01L29/66742 ,  H01L21/324 ,  H01L21/67109 ,  H01L21/67201 ,  H01L21/67745 ,  H01L27/1262

Abstract: Provided is a method for fabricating an array substrate. The method for fabricating the array substrate includes forming a semiconductor layer on a substrate, forming a gate electrode which is insulated from the semiconductor layer, forming source and drain electrodes which are insulated from the gate electrode and connected to the semiconductor layer, and forming a pixel electrode connected to the drain electrode. Here, at least one of the forming of the gate electrode, the forming of the source and drain electrodes, and the forming of the pixel electrode includes forming a conductive layer on the substrate, cooling the substrate on which the conductive layer is formed to a temperature of no greater than about 0° C., heating the cooled substrate, and patterning the conductive layer.

Abstract translation: 提供一种制造阵列基板的方法。 制造阵列基板的方法包括在基板上形成半导体层，形成与半导体层绝缘的栅电极，形成与栅电极绝缘并连接到半导体层的源电极和漏电极，并形成 像素电极连接到漏电极。 这里，形成栅电极，形成源电极和漏电极以及形成像素电极中的至少一个包括在衬底上形成导电层，将形成有导电层的衬底冷却到 温度不大于约0℃，加热冷却的基底，并图形化导电层。