公开(公告)号：US20230326411A1

公开(公告)日：2023-10-12

申请号：US18116104

申请日：2023-03-01

Applicant: Samsung Display Co., Ltd.

Inventor： Haijung In ,  Minku Lee ,  Seunghee Lee

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2310/08

Abstract: A stage of a gate driver includes: a first node controller and a second node controller. The first node controller includes a first control transistor connected between a first node and a second node, and the first control transistor includes a first gate and a second gate that are connected to a first voltage input terminal for receiving a first voltage of an on-voltage level. The second node controller includes a second control transistor connected between a third node and a second voltage input terminal for receiving a second voltage of an off-voltage level, and the second control transistor includes a first gate connected to the first node and a second gate connected to the second voltage input terminal.

公开(公告)号：US11004393B2

公开(公告)日：2021-05-11

申请号：US16877299

申请日：2020-05-18

Applicant: Samsung Display Co., Ltd.

Inventor： Minkyu Woo ,  Minku Lee ,  Junwon Choi

IPC: G09G3/3233 ,  H01L27/32 ,  G09G3/3266 ,  H01L51/56 ,  G09G3/3275 ,  H01L51/52

Abstract: A display device includes: a first driving transistor including a first gate electrode and a first semiconductor layer including a first source region and a first drain region, the first driving transistor being in a first pixel area of a substrate; a second driving transistor including a second gate electrode and a second semiconductor layer including a second source region and a second drain region, the second driving transistor being in a second pixel area adjacent the first pixel area of the substrate; a first electrode layer overlapping at least a portion of the first source region of the first driving transistor; a second electrode layer overlapping at least a portion of the second source region of the second driving transistor; a first power line electrically connected to the first electrode layer; and a second power line electrically connected to the second electrode layer.

公开(公告)号：US11839121B2

公开(公告)日：2023-12-05

申请号：US17209833

申请日：2021-03-23

Applicant: Samsung Display Co., Ltd.

Inventor： Minku Lee ,  Jihyun Ka ,  Kwangsae Lee

IPC: H10K59/131 ,  H10K59/123 ,  G09G3/3225

CPC classification number: H10K59/131 ,  G09G3/3225 ,  H10K59/123

Abstract: A display panel including a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; and a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area.

公开(公告)号：US20230290305A1

公开(公告)日：2023-09-14

申请号：US17891948

申请日：2022-08-19

Applicant: Samsung Display Co., Ltd.

Inventor： Soongi Kwon ,  Jihyun Ka ,  Minjeong Kim ,  Minku Lee ,  Seunghee Lee ,  Hyeongjun Jin

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0233

Abstract: A pixel includes a display element, a driving transistor, a storage capacitor, a scan transistor, and a gate control circuit. The display element may emit light for an emission period, wherein the display element includes an anode and a cathode. The driving transistor may control an amount of a driving current flowing through the display element, wherein the driving transistor includes a first gate and a second gate. The storage capacitor is electrically connected to the first gate of the driving transistor. The scan transistor may be turned on for a data-write period for transferring a data voltage to the driving transistor. The lower gate control circuit may electrically connect the second gate of the driving transistor to the anode of the display element for the emission period, and may apply a bias voltage to the second gate of the driving transistor for the data-write period.