公开(公告)号：US09871086B2

公开(公告)日：2018-01-16

申请号：US15276468

申请日：2016-09-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joung-Keun Park ,  Ki Wan Ahn ,  Joo Sun Yoon

IPC: H01L27/32 ,  H01L51/52

CPC classification number: H01L27/3262 ,  H01L27/322 ,  H01L27/3246 ,  H01L27/326 ,  H01L27/3265 ,  H01L27/3276 ,  H01L51/5209

Abstract: Provided is a display device, including: a substrate; signal lines including a gate line, a data line, and a driving voltage line that collectively define an outer boundary of a pixel area; a transistor connected to the signal line; a first electrode extending across the pixel area and formed on the signal line and the transistor, and connected to the transistor, the first electrode having a first portion overlying only the signal line and the transistor, and a second portion comprising all of the first electrode not included in the first portion; a pixel defining layer formed on only the first portion of the first electrode; an organic emission layer formed on substantially the entire second portion but not on the first portion; and a second electrode formed on the pixel defining layer and the organic emission layer.

公开(公告)号：US09455308B2

公开(公告)日：2016-09-27

申请号：US14723105

申请日：2015-05-27

Applicant: Samsung Display Co., Ltd.

Inventor： Joung-Keun Park ,  Ki Wan Ahn ,  Joo Sun Yoon

IPC: H01L27/32 ,  H01L51/52

CPC classification number: H01L27/3262 ,  H01L27/322 ,  H01L27/3246 ,  H01L27/326 ,  H01L27/3265 ,  H01L27/3276 ,  H01L51/5209

Abstract: Provided is a display device, including: a substrate; signal lines including a gate line, a data line, and a driving voltage line that collectively define an outer boundary of a pixel area; a transistor connected to the signal line; a first electrode extending across the pixel area and formed on the signal line and the transistor, and connected to the transistor, the first electrode having a first portion overlying only the signal line and the transistor, and a second portion comprising all of the first electrode not included in the first portion; a pixel defining layer formed on only the first portion of the first electrode; an organic emission layer formed on substantially the entire second portion but not on the first portion; and a second electrode formed on the pixel defining layer and the organic emission layer.

公开(公告)号：US09202896B2

公开(公告)日：2015-12-01

申请号：US13960341

申请日：2013-08-06

Applicant: Samsung Display Co., Ltd.

Inventor： Joo-Sun Yoon ,  Ki-Wan Ahn ,  Joung-Keun Park

IPC: H01L29/66 ,  H01L29/786 ,  H01L51/56 ,  H01L27/32

CPC classification number: H01L29/66969 ,  H01L27/3262 ,  H01L29/78621 ,  H01L29/7869 ,  H01L29/78693

Abstract: A method of manufacturing a thin film transistor (TFT), including forming an oxide semiconductor pattern including a first region, a second region and a third region on a substrate, directly plasma processing the first region and the second region of the oxide semiconductor pattern, forming an insulating layer on the substrate to cover the oxide semiconductor pattern, forming a gate electrode on the insulating layer to overlap the third region, and forming a source electrode and a drain electrode that are insulated from the gate electrode and that contact the first region, the second region being disposed between the first region and the third region.

Abstract translation: 一种制造薄膜晶体管（TFT）的方法，包括在衬底上形成包括第一区域，第二区域和第三区域的氧化物半导体图案，直接等离子体处理氧化物半导体图案的第一区域和第二区域， 在所述基板上形成绝缘层以覆盖所述氧化物半导体图案，在所述绝缘层上形成与所述第三区域重叠的栅电极，以及形成与所述栅电极绝缘并与所述第一区域接触的源电极和漏电极 所述第二区域设置在所述第一区域和所述第三区域之间。

公开(公告)号：US20140256076A1

公开(公告)日：2014-09-11

申请号：US14281146

申请日：2014-05-19

Applicant: Samsung Display Co., Ltd.

Inventor： Joung-Keun Park ,  Jae-Hyuk Jang

IPC: H01L27/12

CPC classification number: H01L27/127 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3262

Abstract: A display device includes a substrate; a gate wire including a gate electrode and a first capacitor electrode formed on the substrate; a gate insulating layer formed on the gate wire; a semiconductor layer pattern formed on the gate insulating layer, and including an active region overlapping at least a part of the gate electrode and a capacitor region overlapping at least a part of the first capacitor electrode; an etching preventing layer formed on a part of the active region of the semiconductor layer pattern; and a data wire including a source electrode and a drain electrode formed over the active region of the semiconductor layer from over the etching preventing layer, and separated with the etching preventing layer therebetween, and a second capacitor electrode formed on the capacitor region of the semiconductor layer.

Abstract translation: 显示装置包括基板; 栅极线，其包括形成在所述基板上的栅极电极和第一电容器电极; 形成在栅极线上的栅绝缘层; 形成在所述栅极绝缘层上的半导体层图案，并且包括与所述栅电极的至少一部分重叠的有源区域和与所述第一电容器电极的至少一部分重叠的电容器区域; 形成在半导体层图案的有源区的一部分上的防蚀层; 以及数据线，其包括源极电极和漏电极，所述源电极和漏极形成在所述半导体层的有源区上方，从所述防蚀层的上方形成并与所述防蚀层隔开，并且形成在所述半导体的电容器区域上的第二电容器电极 层。