公开(公告)号：US10177759B2

公开(公告)日：2019-01-08

申请号：US15193600

申请日：2016-06-27

Applicant: STMicroelectronics S.R.L.

Inventor： Valeria Bottarel ,  Sandro Rossi

IPC: H03K17/687 ,  A61B8/00 ,  H03K5/08 ,  H03K17/74

Abstract: Switching circuitry includes first and second transistors in series between two terminals and including a common control node with a capacitance between the common control node and an intermediate point. A control circuit includes first and second circuits configured to charge and discharge the capacitance as a function of first and second control signals. The control circuit includes a third circuit having a plurality of diodes and a switch that operates when the voltage at the capacitance is greater than a threshold two diodes in cascade between the intermediate point and the common control node to enable current flow from the intermediate point to the common control node. When the voltage at the capacitance is smaller than the given threshold two diodes are connected in series between the common control node and the intermediate point to enable current flow from the common control node to the intermediate point.

公开(公告)号：US20170310320A1

公开(公告)日：2017-10-26

申请号：US15193600

申请日：2016-06-27

Applicant: STMicroelectronics S.R.L.

Inventor： Valeria Bottarel ,  Sandro Rossi

IPC: H03K17/687 ,  A61B8/00 ,  H03K5/08 ,  H03K17/74

CPC classification number: H03K17/687 ,  A61B8/4494 ,  H03K5/08 ,  H03K17/6874 ,  H03K17/74

Abstract: Switching circuitry includes first and second transistors in series between two terminals and including a common control node with a capacitance between the common control node and an intermediate point. A control circuit includes first and second circuits configured to charge and discharge the capacitance as a function of first and second control signals. The control circuit includes a third circuit having a plurality of diodes and a switch that operates when the voltage at the capacitance is greater than a threshold two diodes in cascade between the intermediate point and the common control node to enable current flow from the intermediate point to the common control node. When the voltage at the capacitance is smaller than the given threshold two diodes are connected in series between the common control node and the intermediate point to enable current flow from the common control node to the intermediate point.

公开(公告)号：US20160204778A1

公开(公告)日：2016-07-14

申请号：US15076211

申请日：2016-03-21

Applicant: STMicroelectronics S.r.l.

Inventor： Sandro Rossi ,  Davide Ugo Ghisu ,  Fabio Quaglia ,  Antonio Davide Leone

IPC: H03K17/16

CPC classification number: G05F3/02 ,  B06B1/0215 ,  H03K4/94 ,  H03K17/162

Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit, which generates current-integrator drive currents. The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods. A current integrator integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.

Abstract translation: 传输通道传输高电压脉冲并接收高电压脉冲的回波。 传输通道包括产生电流积分器驱动电流的电流发生器电路。 控制电路产生一个或多个控制信号，以在换能器驱动期间通过电流发生器电路来控制电流积分器驱动电流的产生。 电流积分器集成了由电流发生器电路产生的电流积分器驱动电流以产生换能器驱动信号。

公开(公告)号：US09209763B2

公开(公告)日：2015-12-08

申请号：US14052495

申请日：2013-10-11

Applicant: STMicroelectronics S.r.l.

Inventor： Valeria Bottarel ,  Giulio Ricotti ,  Sandro Rossi

IPC: H03F3/45 ,  H02N2/18 ,  H02M1/00

CPC classification number: H03F3/45076 ,  H02M2001/0006 ,  H02N2/181

Abstract: A differentiator generates a time derivative signal from a time-variable signal. A transconductance amplifier generates a biasing control signal as a function of the time derivative signal. A supply network functions to supply the differentiator and transconductance amplifier. The supply network is driven by the biasing control signal output from the transconductance amplifier. With this configuration, speed of operation of the differentiator and transconductance amplifier vary with the supply provided by the supply network, and the supply is modulated as a function of the received time-variable signal.

Abstract translation: 微分器从时间变量信号产生时间导数信号。 跨导放大器产生作为时间导数信号的函数的偏置控制信号。 供电网络用于提供微分器和跨导放大器。 供电网络由跨导放大器输出的偏置控制信号驱动。 利用这种配置，微分器和跨导放大器的操作速度随着供电网络的供给而变化，并且电源根据接收到的时间变量信号进行调制。

公开(公告)号：US10734954B2

公开(公告)日：2020-08-04

申请号：US15691298

申请日：2017-08-30

Applicant: STMicroelectronics S.r.l.

Inventor： Andrea Gambero ,  Davide Ugo Ghisu ,  Sandro Rossi

IPC: H03F1/14 ,  H03F1/30 ,  H03F3/217 ,  H03F3/45 ,  H04R3/00 ,  H03F3/30 ,  H03F3/72 ,  H03F3/187

Abstract: An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the output stage and switchable between a first state and a second state in which the output stage is active and non-active, respectively—. A further switch circuit is coupled to the output terminal and switchable between a first state and a second state in which the output stage is coupled to the output terminal and to a reference level, respectively.

公开(公告)号：US10441972B2

公开(公告)日：2019-10-15

申请号：US15220208

申请日：2016-07-26

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Ugo Ghisu ,  Sandro Rossi ,  Dario Bianchi

IPC: G05F3/02 ,  B06B1/02 ,  H03K19/0185 ,  H03K17/687 ,  H03K3/356 ,  H03K17/082 ,  A61B8/00

Abstract: A transmission channel transmits high-voltage pulses in a transmission phase and receives echoes of the high-voltage pulses in a receiving phase. The transmission channel includes a buffer with anti-memory circuitry to couple drain conduction terminals of buffer transistors of a high-side of a buffer of the transmission channel to a low-side reference voltage of a low-side of the buffer and couple drain conduction terminals of buffer transistors of the low-side of the buffer to a high-side reference voltage of the high-side of the buffer during the clamping phase.

公开(公告)号：US20180248522A1

公开(公告)日：2018-08-30

申请号：US15691298

申请日：2017-08-30

Applicant: STMicroelectronics S.r.l.

Inventor： Andrea Gambero ,  Davide Ugo Ghisu ,  Sandro Rossi

IPC: H03F1/30 ,  H03F3/217 ,  H03F3/45 ,  H04R3/00

CPC classification number: H03F1/305 ,  H03F1/307 ,  H03F3/187 ,  H03F3/217 ,  H03F3/302 ,  H03F3/45475 ,  H03F3/72 ,  H03F2200/03 ,  H03F2200/297 ,  H03F2200/516 ,  H03F2203/30099 ,  H03F2203/30132 ,  H04R3/00

Abstract: An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the output stage and switchable between a first state and a second state in which the output stage is active and non-active, respectively—. A further switch circuit is coupled to the output terminal and switchable between a first state and a second state in which the output stage is coupled to the output terminal and to a reference level, respectively.

公开(公告)号：US09886940B2

公开(公告)日：2018-02-06

申请号：US14518894

申请日：2014-10-20

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Albertini ,  Sandro Rossi

IPC: H03K5/08 ,  G10K11/18 ,  H03K3/355 ,  H03K5/125 ,  H03K19/0175 ,  H03K19/0185 ,  H03K5/003 ,  B06B1/02

CPC classification number: G10K11/18 ,  B06B1/0215 ,  B06B2201/76 ,  H03K3/355 ,  H03K5/003 ,  H03K5/125 ,  H03K19/017509 ,  H03K19/018521

Abstract: A device voltage shifter includes a first voltage reference node, a second voltage reference node, an output node and a clamp node. A first high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node and a second conduction terminal coupled to the clamp node. A second high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the clamp node and a second conduction terminal coupled to the second voltage reference node. A third high-voltage switching transistor of the voltage shifter has a first conduction terminal coupled to the first voltage reference node, a control terminal coupled to the clamp node, and a second conduction terminal coupled to the output node. A voltage regulator of the voltage shifter is coupled between the output node and the clamp node.

公开(公告)号：US20170257092A1

公开(公告)日：2017-09-07

申请号：US15216271

申请日：2016-07-21

Applicant: STMicroelectronics S.R.L.

Inventor： Sandro Rossi ,  Valeria Bottarel

IPC: H03K17/687 ,  H03K19/0175

CPC classification number: H03K17/687 ,  H03K3/3565 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/6872 ,  H03K19/017509 ,  H03K19/018521 ,  H03K2217/0036 ,  H03K2217/0045

Abstract: A gate driver circuit for a half bridge or full bridge output driver stage having a high side branch connected to one or more high side transistors and a low side branch connected to one or more low side transistors. A high side gate driver and a low side gate driver receive input signals at a low voltage level and output signals at a high voltage level as gate driving signals for the high side transistors and low side transistors. Each of the high side and the low side branches of the gate driver includes a set-reset latch having a signal output that is fed as a gate signal to the corresponding transistor of the half bridge or full bridge driver. A differential capacitive level shifter circuit receives the input signals at a low voltage level and outputs high voltage signals to drive the set and reset inputs of the set-reset latch.

公开(公告)号：US09442507B2

公开(公告)日：2016-09-13

申请号：US14573438

申请日：2014-12-17

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Ugo Ghisu ,  Sandro Rossi ,  Dario Bianchi

IPC: H03L5/00 ,  G05F3/02 ,  H03K19/0185 ,  H03K17/687 ,  H03K3/356

CPC classification number: B06B1/0215 ,  A61B8/4483 ,  G05F3/02 ,  H03K3/356182 ,  H03K17/0822 ,  H03K17/687 ,  H03K19/018521 ,  H03K2217/0063

Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a buffer with anti-memory circuitry to couple drains of the buffer transistors to voltage reference terminals during a clamping phase.

Abstract translation: 传输通道传输高电压脉冲并接收高电压脉冲的回波。 传输通道包括具有防存储器电路的缓冲器，以在夹持阶段将缓冲晶体管的漏极耦合到电压参考端子。