公开(公告)号：US20160056233A1

公开(公告)日：2016-02-25

申请号：US14818516

申请日：2015-08-05

Applicant: Renesas Electronics Corporation

Inventor： Akira MITSUIKI ,  Tomoo NAKAYAMA ,  Shigeaki SHIMIZU ,  Hiroyuki OKUAKI

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/311 ,  H01L29/78 ,  H01L21/762 ,  H01L21/32

CPC classification number: H01L27/088 ,  H01L21/3083 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/76232 ,  H01L21/823418 ,  H01L21/823456 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/41775 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/78 ,  H01L29/7833 ,  H01L29/7835

Abstract: Electric-field concentration in the vicinity of a recess is suppressed. A gate insulating film is provided on a substrate that has a drain region and a first recess therein. The first recess is located between the gate insulating film and the drain region, and is filled with an insulating film. The insulating film has a second recess on its side close to the gate insulating film. An angle defined by an inner side face of the first recess and the surface of the substrate is rounded on a side of the drain region close to the gate insulating film.

Abstract translation: 抑制了凹部附近的电场集中。 栅极绝缘膜设置在其上具有漏极区域和第一凹部的衬底上。 第一凹部位于栅极绝缘膜和漏极区之间，并且填充有绝缘膜。 绝缘膜在靠近栅极绝缘膜的一侧具有第二凹部。 由第一凹部的内侧面和基板的表面限定的角度在靠近栅极绝缘膜的漏极区域的一侧为圆形。