-
公开(公告)号：US20160334573A1
公开(公告)日：2016-11-17
申请号：US15152117
申请日：2016-05-11
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Hiroyuki KUNISHIMA , Yasutaka NAKASHIBA , Masaru WAKABAYASHI , Shinichi WATANUKI
IPC: G02B6/122 , G02B6/28 , H01L23/522 , G02F1/025 , H01L23/528 , H01L23/532
CPC classification number: G02F1/025 , G02B6/125 , G02B6/132 , G02B6/2852 , G02B2006/12061 , G02B2006/12142 , G02B2006/12147 , G02F2201/08 , H01L23/53214 , H01L23/53228 , H01L2224/05
Abstract: A low reflectance film with a second reflectance (50% or lower) lower than a first reflectance is formed between an optical directional coupler and a first-layer wiring with the first reflectance. Thus, even when the first-layer wiring is formed above the optical directional coupler, the influence of the light reflected by the first-layer wiring on the optical signal propagating through the first optical waveguide and the second optical waveguide of the optical directional coupler can be reduced. Accordingly, the first-layer wiring can be arranged above the optical directional coupler, and the restriction on the layout of the first-layer wiring is relaxed.
Abstract translation: 在具有第一反射率的光学定向耦合器和第一层布线之间形成具有比第一反射率低的第二反射率（50％或更低）的低反射率膜。 因此，即使当第一层布线形成在光学定向耦合器上方时，由第一层布线反射的光对通过光学定向耦合器的第一光波导和第二光波导传播的光信号的影响可以 减少 因此，第一层布线可以布置在光学定向耦合器的上方，并且第一层布线的布局的限制被放宽。
-
公开(公告)号：US20190187370A1
公开(公告)日：2019-06-20
申请号：US16176327
申请日：2018-10-31
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Yasutaka NAKASHIBA , Shinichi WATANUKI
IPC: G02B6/122
CPC classification number: G02B6/122 , G02B2006/12061 , G02B2006/12097 , G02B2006/12142
Abstract: In an optical waveguide section of an SIS type having a configuration of stacking a second semiconductor layer over a first semiconductor layer with a dielectric layer interposed, the first semiconductor layer is electrically coupled to a first electrode at a first lead-out section where the second semiconductor layer is not stacked. Further, the second semiconductor layer is electrically coupled to a second electrode at a second lead-out section not overlapping with the first semiconductor layer. As a result, when a contact hole for forming the second electrode is formed by dry etching, the dielectric layer between the first semiconductor layer and the second semiconductor layer is not damaged or broken and hence short-circuit failure between the first semiconductor layer and the second semiconductor layer can be prevented. The reliability of the optical waveguide section therefore can be improved.
-
公开(公告)号：US20190006535A1
公开(公告)日：2019-01-03
申请号：US15980661
申请日：2018-05-15
Applicant: Renesas Electronics Corporation
Inventor： Teruhiro KUWAJIMA , Shinichi WATANUKI , Futoshi KOMATSU , Tomoo NAKAYAMA
IPC: H01L31/0232 , H01L31/18 , H01L31/024 , H01L31/02 , H01L31/028 , G02B6/43 , G02F1/025
Abstract: An improvement is achieved in the reliability of a semiconductor device. Over an insulating layer, an optical waveguide and a p-type semiconductor portion are formed. Over the p-type semiconductor portion, a multi-layer body including an n-type semiconductor portion and a cap layer is formed. Over a first interlayer insulating film covering the optical waveguide, the p-type semiconductor portion, and the multi-layer body, a heater located over the optical waveguide is formed. In the first interlayer insulating film, first and second contact holes are formed. A first contact portion electrically coupled with the p-type semiconductor portion is formed continuously in the first contact hole and over the first interlayer insulating film. A second contact portion electrically coupled with the cap layer is formed continuously in the second contact hole and over the first interlayer insulating film. A wire formed over a second interlayer insulating film is electrically coupled with the heater and the first and second contact portions via plugs embedded in the second interlayer insulating film.
-
公开(公告)号：US20180052338A1
公开(公告)日：2018-02-22
申请号：US15798780
申请日：2017-10-31
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Hiroyuki KUNISHIMA , Yasutaka NAKASHIBA , Masaru WAKABAYASHI , Shinichi WATANUKI
Abstract: A low reflectance film with a second reflectance (50% or lower) lower than a first reflectance is formed between an optical directional coupler and a first-layer wiring with the first reflectance. Thus, even when the first-layer wiring is formed above the optical directional coupler, the influence of the light reflected by the first-layer wiring on the optical signal propagating through the first optical waveguide and the second optical waveguide of the optical directional coupler can be reduced. Accordingly, the first-layer wiring can be arranged above the optical directional coupler, and the restriction on the layout of the first-layer wiring is relaxed.
-
公开(公告)号：US20170315312A1
公开(公告)日：2017-11-02
申请号：US15648214
申请日：2017-07-12
Applicant: Renesas Electronics Corporation
Inventor： Shinichi WATANUKI , Yasutaka NAKASHIBA
CPC classification number: G02B6/428 , G02B6/43 , G02B2006/12061
Abstract: An interposer includes a plurality of identical functional blocks arranged in the x direction, for example, and the functional blocks include a first region mounting a semiconductor chip, a second region mounting a light emitting element chip, a third region mounting a light receiving element chip, and a plurality of silicon waveguides. Then, the second and third regions are arranged between the first region and a first side along the x direction of the interposer. In addition, the plurality of silicon waveguides are arranged between the second region and the first side, and between the third region and the first side, extending from the second region toward the first side and from the third region toward the first side and are not formed between the functional blocks adjacent in the x direction.
-
Patent Agency Ranking
公开(公告)号：US20170263802A1
公开(公告)日：2017-09-14
申请号：US15606281
申请日：2017-05-26
Applicant: Renesas Electronics Corporation
Inventor： Shinichi WATANUKI , Atsuro INADA
IPC: H01L31/18 , H01L31/0232
CPC classification number: H01L31/18 , G02B6/122 , G02B6/1223 , G02B6/13 , G02B6/136 , G02F1/025 , H01L31/02325
Abstract: A semiconductor substrate, an insulating layer made of silicon oxide formed on the semiconductor substrate and a semiconductor layer made of silicon formed on the insulating layer are provided, and the semiconductor layer constitutes an optical waveguide in an optical signal transmission line section and an optical modulator in an optical modulation section. Also, the insulating layer is removed except for a part thereof to have a hollow structure with a cavity, and both side surfaces and a lower surface of each of the semiconductor layers constituting the optical waveguide and the optical modulator are exposed and covered with air.
-
公开(公告)号：US20170031095A1
公开(公告)日：2017-02-02
申请号：US15188914
申请日：2016-06-21
Applicant: Renesas Electronics Corporation
Inventor： Yasutaka NAKASHIBA , Shinichi WATANUKI
CPC classification number: G02B6/122 , G02B6/12004 , G02B6/132 , G02B2006/12061 , G02B2006/12097 , G02F1/025 , G02F2001/0152 , G02F2202/103 , G02F2202/104 , H01L31/0248
Abstract: An SOI substrate includes a base substrate, a polycrystalline silicon layer formed on the base substrate, an insulating layer formed on the polycrystalline silicon layer, and a semiconductor layer formed on the insulating layer, and optical waveguides are formed in the semiconductor layer of the SOI substrate. Thus, by arranging the polycrystalline silicon layer under the insulating layer, the insulating layer can be made thin. Since the polycrystalline silicon layer includes a plurality of grains (amass of grains made of a single crystal Si), even when leakage of light is generated beyond the insulating layer, reflection (diffusion) of light can be suppressed. In addition, by arranging the polycrystalline silicon layer under the insulating layer, the insulating layer can be made thin, so that distortion of a substrate can be suppressed.
Abstract translation: SOI基板包括基底基板，形成在基底基板上的多晶硅层，形成在多晶硅层上的绝缘层，以及形成在绝缘层上的半导体层，在SOI的半导体层中形成光波导 基质。 因此，通过将多晶硅层配置在绝缘层的下方，可以使绝缘层变薄。 由于多晶硅层包括多个晶粒（由单晶Si制成的晶粒的淀积），所以即使在超过绝缘层的情况下产生光的泄漏，也可以抑制光的反射（扩散）。 此外，通过将多晶硅层设置在绝缘层的下方，可以使绝缘层变薄，从而能够抑制基板的变形。
-
公开(公告)号：US20230251418A1
公开(公告)日：2023-08-10
申请号：US17666948
申请日：2022-02-08
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Yasutaka NAKASHIBA , Shinichi WATANUKI
CPC classification number: G02B6/12004 , G02B6/125 , G02B6/136 , G02B6/132 , G02B2006/12061 , G02B2006/12142
Abstract: A semiconductor device includes: a semiconductor substrate; an insulating layer formed on the semiconductor substrate; an optical waveguide formed on the insulating layer, extending in a first direction in a plan view, and being made of silicon; and an interlayer insulating film formed on the insulating layer to cover the optical waveguide. In this case, a crystal surface of a side surface of the optical waveguide is a (111) surface.
-
公开(公告)号：US20220158005A1
公开(公告)日：2022-05-19
申请号：US16950479
申请日：2020-11-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Shotaro KUDO , Shinichi WATANUKI , Takashi OGURA
IPC: H01L31/0232 , H01L31/18
Abstract: A Semiconductor device includes an insulating layer, an optical waveguide, a first dummy semiconductor film, a second semiconductor film and a third semiconductor film. The optical waveguide is formed on the insulating layer. The first dummy semiconductor film is formed on the insulating layer and is spaced apart from the optical waveguide. The first dummy semiconductor film is formed on the first semiconductor film. The second semiconductor film is integrally formed with the optical waveguide as a single member on the insulating layer. The third semiconductor film is formed on the second semiconductor film. A material of the first dummy semiconductor film is different from a material of the optical waveguide. In plan view, a distance between the optical waveguide and the first dummy semiconductor film in a first direction perpendicular to an extending direction of the optical waveguide is greater than a thickness of the insulating layer.
-
20.发明申请公开(公告)号：US20190391327A1
公开(公告)日：2019-12-26
申请号：US16411993
申请日：2019-05-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Shinichi WATANUKI , Yasutaka NAKASHIBA
Abstract: The semiconductor device has an optical waveguide formed on a substrate, a first conductor film formed in the same layer as the optical waveguide, an insulating film formed on the first conductor film, a second conductor film formed on the insulating film, and a first interlayer insulating film formed on the substrate so as to cover the optical waveguide and the second conductor film. The semiconductor device includes a first contact hole reaching the first conductor film, a second contact hole reaching the second conductor film, a first contact plug formed in the first contact hole, and a second contact plug formed in the second contact hole. The first conductor film is disposed between the first contact plugs and the board, but the second conductor film is not disposed between the first contact plugs and the board.
-
-
-
-
-
-
-
-
-
Search Results
24
records
(took 0.017 seconds)
