CLUTTER INTERFERENCE MANAGEMENT
    11.
    发明申请

    公开(公告)号:US20220116194A1

    公开(公告)日:2022-04-14

    申请号:US17644811

    申请日:2021-12-17

    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a base station may determine, for full-duplex mode communication on a first link and a second link, a timing adjustment to at least one of a first timing or a second timing, wherein the timing adjustment is to cause a delay between clutter reflection from a first signal and an occurrence of a second signal to occur during a cyclic prefix of the second signal; cause the timing adjustment to be applied to the at least one of the first timing or the second timing; and communicate in the full-duplex mode with a first node and a second node in accordance with the timing adjustment, wherein communicating includes transmitting the first signal to the first node and receiving the second signal from the second node. Numerous other aspects are provided.

    SLOT FORMAT CONFIGURATION TO SUPPORT FULL-DUPLEX OPERATION

    公开(公告)号:US20210203469A1

    公开(公告)日:2021-07-01

    申请号:US17129328

    申请日:2020-12-21

    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a wireless node may receive, from a control node, information identifying a slot configuration pattern for a wireless communication link between the wireless node and another wireless node. For example, the information identifying the slot configuration pattern may indicate one or more symbols that are configured to support full-duplex communication. The wireless node may communicate with the other wireless node in the one or more symbols configured to support full-duplex communication in accordance with the slot configuration pattern. Numerous other aspects are provided.

    TECHNIQUES FOR DETERMINING BEAMS FOR FULL DUPLEX WIRELESS COMMUNICATIONS

    公开(公告)号:US20210144725A1

    公开(公告)日:2021-05-13

    申请号:US17084382

    申请日:2020-10-29

    Abstract: Aspects described herein relate to determining, by a node, to establish a first connection with a first upstream node for receiving downlink communications, and determining, by the node, to establish a second connection with a second upstream node for transmitting uplink communications or establishing a second connection with the same upstream node based on a second transmit/receive beam pair. The first connection can be established with the first upstream node based on a first transmit/receive beam pair. The second connection can be established with the second upstream node (or the same upstream node) based on a second transmit/receive beam pair and concurrently with the first connection is established with the first upstream node.

    CLUTTER INTERFERENCE MANAGEMENT
    19.
    发明申请

    公开(公告)号:US20210243002A1

    公开(公告)日:2021-08-05

    申请号:US17248189

    申请日:2021-01-13

    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a base station may determine, for full-duplex mode communication on a first link and a second link, a timing adjustment to at least one of a first timing or a second timing, wherein the timing adjustment is to cause a delay between clutter reflection from a first signal and an occurrence of a second signal to occur during a cyclic prefix of the second signal; cause the timing adjustment to be applied to the at least one of the first timing or the second timing; and communicate in the full-duplex mode with a first node and a second node in accordance with the timing adjustment, wherein communicating includes transmitting the first signal to the first node and receiving the second signal from the second node. Numerous other aspects are provided.

    TRANSMIT/RECEIVE SWITCHING CIRCUIT
    20.
    发明申请

    公开(公告)号:US20190081596A1

    公开(公告)日:2019-03-14

    申请号:US15997575

    申请日:2018-06-04

    Abstract: A transmit/receive switching circuit implementation reduces transmitting/receiving switching losses in a transceiver during different modes of operation. The implementation includes connecting a low noise amplifier and a power amplifier in accordance with a shunt configuration in the transceiver. The implementation also includes disabling the power amplifier to achieve a high impedance state by grounding an output stage bias and enabling the low noise amplifier and disabling one or more transistors connected to a path between the low noise amplifier and the power amplifier during a receive mode.

Patent Agency Ranking