公开(公告)号：US20200311859A1

公开(公告)日：2020-10-01

申请号：US16368782

申请日：2019-03-28

Applicant: QUALCOMM Incorporated

Inventor： Yun DU ,  Nigel POOLE ,  Zilin YING ,  Ling Feng HUANG ,  Donghyun KIM ,  Chun YU ,  Tzun-Wei LEE ,  Xuefeng TANG ,  Shambhoo KHANDELWAL ,  Hongjiang SHANG ,  Elina KAMENETSKAYA ,  Zhu LIANG ,  Cary ROBINS

IPC: G06T1/20 ,  G06F9/48

Abstract: The present disclosure relates to methods and apparatus for graphics processing. In some aspects, multiple processing units can be in a graphics processing pipeline of a GPU. The apparatus can also group the multiple processing units into one or more processing unit clusters. In some aspects, each of the one or more processing unit clusters can correspond to one or more context registers. Additionally, the apparatus can determine one or more context states of the one or more context registers in each of the one or more processing unit clusters. Also, the apparatus can implement one or more execution counters corresponding to at least one of the one or more processing unit clusters in the graphics processing pipeline, where each of the one or more execution counters includes an execution value.