-
11.发明授权公开(公告)号：US11271599B2
公开(公告)日：2022-03-08
申请号：US17125252
申请日：2020-12-17
Applicant: QUALCOMM INCORPORATED
Inventor： Iulian Mirea , Gerard James Wimpenny , Jingxue Lu , Jongshick Ahn
Abstract: An envelope tracking system includes an envelope signal generator, a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode, a capacitor having a first and second terminal, the first terminal coupled to ground, a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node, and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor such that a voltage across the capacitor changes from a first voltage to a second voltage.
-
公开(公告)号：US11258409B2
公开(公告)日：2022-02-22
申请号：US16929353
申请日：2020-07-15
Applicant: QUALCOMM Incorporated
Inventor： Justin Philpott , Xiaocheng Jing , Jingxue Lu , Iulian Mirea
Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.
-
Patent Agency Ranking
公开(公告)号：US20160266591A1
公开(公告)日：2016-09-15
申请号：US14656398
申请日：2015-03-12
Applicant: QUALCOMM Incorporated
Inventor： Jun Hua , Iulian Mirea
IPC: G05F1/445
Abstract: Disclosed is circuitry having an input stage and an output stage. A first compensation network may be connected to the input and output stages, and configured to split a pole at the input stage and a pole at the output stage. A second compensation network may be connected to the input and output stage. The second compensation network may be configured to suppress peaking of a gain of the circuit at frequencies near the pole at the output stage.
Abstract translation: 公开了具有输入级和输出级的电路。 第一补偿网络可以连接到输入和输出级，并且被配置为在输入级分割极点和在输出级分割极点。 第二补偿网络可以连接到输入和输出级。 第二补偿网络可以被配置为抑制在输出级处的极附近的频率处的电路的增益的峰值。
-
公开(公告)号：US20160036443A1
公开(公告)日：2016-02-04
申请号：US14451079
申请日：2014-08-04
Applicant: QUALCOMM Incorporated
Inventor： Shengyuan Li , Iulian Mirea
IPC: H03K19/0185 , H03K3/356
CPC classification number: H03K19/0185 , H03K3/35613 , H03K5/2481 , H03K19/01721 , H03K19/018514
Abstract: In one embodiment, a method for increasing speed of a differential input pair, The method comprises applying a first boost current to a first input of the differential input pair during a transition of a first signal applied to the first input; storing the first boost current; ending the application of the first boost current in response to the stored first boost current exceeding a first threshold; applying a second boost current to a second input of the differential input pair during a transition of a second signal applied to the second input; storing the second boost current; and ending the application of the second boost current in response to the stored second boost current exceeding a second threshold.
Abstract translation: 在一个实施例中，一种用于增加差分输入对的速度的方法。所述方法包括：在施加到第一输入的第一信号的转变期间，将第一升压电流施加到差分输入对的第一输入; 存储第一升压电流; 响应于所存储的第一升压电流超过第一阈值，结束施加第一升压电流; 在施加到所述第二输入的第二信号的转变期间，将第二升压电流施加到所述差分输入对的第二输入; 存储第二升压电流; 以及响应于所存储的超过第二阈值的第二升压电流而结束施加第二升压电流。
-
公开(公告)号：US11671081B2
公开(公告)日：2023-06-06
申请号：US17119817
申请日：2020-12-11
Applicant: QUALCOMM Incorporated
Inventor： Mukesh Bansal , Iulian Mirea , Xun Liu
CPC classification number: H03K3/356017 , H02M3/158 , H02M1/088
Abstract: Certain aspects of the present disclosure are directed to a regulator. The regulator generally includes a source follower circuit and a low-voltage assist circuit. The low-voltage assist circuit generally includes a first transistor having a gate coupled to an output node of the source follower circuit, a voltage comparison circuit having a first input coupled to a source of the first transistor and a second input coupled to a control input node of the source follower circuit, and a second transistor having a gate coupled to an output of the voltage comparison circuit and a drain coupled to the output node of the source follower circuit.
-
公开(公告)号：US10804854B1
公开(公告)日：2020-10-13
申请号：US16556085
申请日：2019-08-29
Applicant: QUALCOMM Incorporated
Inventor： Moataz Abdelsamie Abdelfattah , Mukesh Bansal , Iulian Mirea , Song Shi , Pengfei Li
Abstract: A tri-level converter provides three levels of power supply to a power amplifier that includes a supply path. The supply path has a first transistor and a first inherent body diode associated with the first transistor, as well as a second transistor and a second inherent body diode associated with the second transistor. A polarity of the second body diode is reversed relative to a polarity of the first body diode. A first driver is configured to drive the first transistor and the first inherent body diode to control a power supply, including a battery supply signal, to an output of the tri-level converter. The tri-level converter is coupled to a switching node.
-
公开(公告)号：US20170229962A1
公开(公告)日：2017-08-10
申请号：US15179229
申请日：2016-06-10
Applicant: QUALCOMM Incorporated
Inventor： Mukesh Bansal , Michael McGowan , Iulian Mirea , Qadeer Khan , Troy Stockstad , Brett Walker , Todd Sutton
CPC classification number: H02M3/158 , G01R19/25 , H02M1/08 , H02M2001/0009
Abstract: Features and advantages of the present disclosure include a switching regulator and current measurement circuit. In one embodiment, a switching transistor in the switching regulator has a first voltage on a first terminal and a switching voltage on a second terminal. A current measurement circuit has first and second input terminals. A first switch couples the second terminal of the switching transistor to the first terminal of the current measurement circuit when the switching transistor is on, where the second input terminal of the current measurement circuit is coupled to the first terminal of the switching transistor and measurement(s) may be taken. When the switching transistor is off, the first and second input terminals of the current measurement circuit are coupled together, and measurements emulate zero current through the switching transistor.
-
-
-
-
-
-
Search Results
17
records
(took 0.015 seconds)
