公开(公告)号：US10142089B2

公开(公告)日：2018-11-27

申请号：US15466469

申请日：2017-03-22

Applicant: Oracle International Corporation

Inventor： Yuhan Yao ,  Xun Zhang ,  Dawei Huang ,  Jianghui Su ,  Muthukumar Vairavan ,  Chaitanya Palusa

IPC: H04L7/00 ,  H04L7/02 ,  H04B1/16 ,  H03L7/08

Abstract: Embodiments include systems and methods for improving link performance and tracking capability of a baud-rate clock data recovery (CDR) system using transition pattern detection. For example, a multi-level signal is received via a data channel and converted to a pseudo-NRZ signal. CDR early/late voting can be derived from the converted (baud-rate) pseudo-NRZ signal and from error signals from the received PAM4 signal, and the voting can be implemented with different phase error detector (PED) functional approaches. Different approaches can yield different CDR performance characteristics and can tend to favor different PAM4 transition patterns. Embodiments can identify jittery patterns for a particular CDR implementation and can add features to the CDR to filter out those patterns from being used for CDR early/late voting.