公开(公告)号：US10483947B2

公开(公告)日：2019-11-19

申请号：US16157165

申请日：2018-10-11

Applicant: MEDIATEK Inc.

Inventor： Tien-Yu Lo ,  Chan-Hsiang Weng ,  Patrick Cooney ,  Tsung-Kai Kao ,  Stacy Ho

IPC: H03H17/04 ,  H03F3/45

Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.

公开(公告)号：US09859914B1

公开(公告)日：2018-01-02

申请号：US15647253

申请日：2017-07-11

Applicant: MEDIATEK INC.

Inventor： Chan-Hsiang Weng ,  Tien-Yu Lo

IPC: H03M3/00 ,  H03M1/12 ,  H03M1/00

CPC classification number: H03M3/426 ,  H03M1/00 ,  H03M1/066 ,  H03M1/12 ,  H03M3/30 ,  H03M3/428 ,  H03M3/436 ,  H03M3/454

Abstract: A delta-sigma modulator includes a receiving circuit, a loop filter module, a quantizer, a delta-sigma truncator, a digital filter module, and an output circuit. The receiving circuit is arranged for receiving a feedback signal and an input signal to generate a summation signal. The loop filter module is arranged for filtering the summation signal to generate a filtered summation signal. The quantizer is arranged for generating a first digital signal according to the filtered summation signal. The delta-sigma truncator is arranged for truncating the first digital signal to generate a second digital signal. The digital filter module is arranged for filtering the first digital signal and the second digital signal to generate a filtered first digital signal and a filtered second digital signal, respectively. The output circuit is arranged for generating an output signal according to the filtered first digital signal and the filtered second digital signal.

公开(公告)号：US09461660B2

公开(公告)日：2016-10-04

申请号：US14938567

申请日：2015-11-11

Applicant: Mediatek Inc.

Inventor： Khurram Muhammad ,  Chi-Lun Lo ,  Frank Op 't Eynde ,  Michael A. Ashburn, Jr. ,  Tien-Yu Lo

IPC: H03M1/06 ,  H03M1/12

CPC classification number: H03M1/0626 ,  H03M1/1255 ,  H03M1/60

Abstract: A method and apparatus for a digitally-corrected analog-to-digital converter (ADC) are disclosed. The apparatus comprises a nonlinearity generator that generates one or more nonlinear characteristics of a time varying input signal and that causes unwanted signal components at frequencies other than a frequency of the time varying input signal, a frequency response modifier coupled to the nonlinearity generator that modifies the unwanted signal components by altering an amplitude of the unwanted signal components, a frequency response compensator coupled to the frequency response modifier, wherein the frequency response compensator compensates for the modification introduced by the frequency response modifier to provide a filtered digital signal, and an inverse nonlinearity generator coupled to the frequency response compensator for receiving the filtered digital signal, wherein the inverse nonlinearity generator compensates for the one or more nonlinear characteristics.

Abstract translation: 公开了一种用于数字校正的模数转换器（ADC）的方法和装置。 该装置包括非线性发生器，其产生时变输入信号的一个或多个非线性特性，并且在不同于时变输入信号的频率的频率下产生不想要的信号分量，耦合到非线性发生器的频率响应修改器， 通过改变不需要的信号分量的幅度的不需要的信号分量，耦合到频率响应修改器的频率响应补偿器，其中频率响应补偿器补偿由频率响应修改器引入的修改以提供经滤波的数字信号，以及反向非线性 耦合到频率响应补偿器的发生器，用于接收经滤波的数字信号，其中逆非线性发生器补偿一个或多个非线性特性。

公开(公告)号：US20160211861A1

公开(公告)日：2016-07-21

申请号：US14886545

申请日：2015-10-19

Applicant: MediaTek Inc.

Inventor： Frank Op 't Eynde ,  Nathan Egan ,  Khurram Muhammad ,  Tien-Yu Lo ,  Chi-Lun Lo ,  Michael A. Ashburn

IPC: H03M3/00

CPC classification number: H03M1/109 ,  H03M1/1038 ,  H03M1/12 ,  H03M3/50

Abstract: Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.

Abstract translation: 描述了用于测量和补偿模数转换器的直流传递特性的系统和方法。 包括Σ-Δ调制器的测试信号发生器可以向ADC提供校准信号。 来自ADC的输出可以用陷波滤波器滤波，以抑制由Σ-Δ调制器引入的离散频率的量化噪声。 所得到的滤波信号可以与输入的数字信号与测试信号发生器进行比较，以确定ADC的传输特性。