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公开(公告)号:US10090428B2
公开(公告)日:2018-10-02
申请号:US14146561
申请日:2014-01-02
Applicant: LG ELECTRONICS INC.
Inventor: Goohwan Shim , Changseo Park , Philwon Yoon , Yoonsil Jin , Jinsung Kim , Youngho Choe , Jaewon Chang
IPC: H01L31/042 , H01L31/18 , H01L31/0216 , H01L31/0224 , H01L31/068
Abstract: A solar cell and a method for manufacturing the same are disclosed. The solar cell may include a substrate, an emitter layer positioned at a first surface of the substrate, a first anti-reflection layer that is positioned on a surface of the emitter layer and may include a plurality of first contact lines exposing a portion of the emitter layer, a first electrode that is electrically connected to the emitter layer exposed through the plurality of first contact lines and may include a plating layer directly contacting the emitter layer, and a second electrode positioned on a second surface of the substrate.
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公开(公告)号:US09972738B2
公开(公告)日:2018-05-15
申请号:US15004116
申请日:2016-01-22
Applicant: LG ELECTRONICS INC.
Inventor: Goohwan Shim , Changseo Park , Philwon Yoon , Yoonsil Jin , Jinsung Kim , Youngho Choe , Jaewon Chang
IPC: H01L31/18 , H01L31/0216 , H01L31/0224 , H01L31/068
CPC classification number: H01L31/18 , H01L31/02168 , H01L31/022425 , H01L31/068 , H01L31/0684 , Y02E10/547
Abstract: A solar cell and a method for manufacturing the same are discussed. The solar cell may include a substrate, an emitter layer positioned at a first surface of the substrate, a first anti-reflection layer that is positioned on a surface of the emitter layer and may include a plurality of first contact lines exposing a portion of the emitter layer, a first electrode that is electrically connected to the emitter layer exposed through the plurality of first contact lines and may include a plating layer directly contacting the emitter layer, and a second electrode positioned on a second surface of the substrate.
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公开(公告)号:US12176225B2
公开(公告)日:2024-12-24
申请号:US17621107
申请日:2019-07-09
Applicant: LG ELECTRONICS INC.
Inventor: Changhyun Jeong , Seongmin Moon , Changseo Park , Donghae Oh
IPC: H01L21/67 , H01L21/683 , H01L25/075 , H01L23/00
Abstract: Discussed is an assembly board including: a base portion; a plurality of assembly electrodes extending in one direction and disposed on the base portion at predetermined intervals; a dielectric layer stacked on the base portion to cover the plurality of assembly electrodes; and barrier ribs stacked on the dielectric layer and defining cells in which semiconductor light emitting diodes are seated at the predetermined intervals along an extending direction of the plurality of assembly electrodes so as to overlap a portion of the plurality of assembly electrodes, wherein the plurality of assembly electrodes include first electrodes and second electrodes disposed on different planes on the base portion, and wherein the first electrodes are disposed on one surface of the base portion, and the second electrodes are disposed on one surface of the dielectric layer.
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公开(公告)号:US11798921B2
公开(公告)日:2023-10-24
申请号:US17530155
申请日:2021-11-18
Applicant: LG ELECTRONICS INC.
Inventor: Changseo Park , Jinhyung Lee , Jungsub Kim , Seongmin Moon , Younho Heo
IPC: H01L25/075 , H01L33/00 , H01L21/683 , H01L33/62
CPC classification number: H01L25/0753 , H01L21/6835 , H01L33/0093 , H01L33/62 , H01L2221/68354 , H01L2221/68363 , H01L2933/0066
Abstract: Discussed is an assembly substrate used for a display device manufacturing method of mounting semiconductor light-emitting diodes on the assembly substrate at preset positions using electric field and magnetic field. The assembly substrate includes a base portion, a plurality of assembly electrodes on the base portion, a dielectric layer on the base portion to cover the assembly electrodes, a barrier wall on the base portion, and a metal shielding layer on the base portion, wherein the metal shielding layer overlaps the barrier wall.
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公开(公告)号:US11211366B2
公开(公告)日:2021-12-28
申请号:US16834315
申请日:2020-03-30
Applicant: LG ELECTRONICS INC.
Inventor: Changseo Park , Jinhyung Lee , Jungsub Kim , Seongmin Moon , Younho Heo
IPC: H01L25/075 , H01L33/00 , H01L21/683 , H01L33/62
Abstract: The present disclosure relates to an assembly substrate used for a display device manufacturing method in which semiconductor light-emitting diodes are placed on the assembly substrate at preset positions using electric field and magnetic field. Specifically, the assembly substrate includes a base portion, a plurality of assembly electrodes extending in one direction and disposed on the base portion, a dielectric layer stacked on the base portion to cover the assembly electrodes, a barrier wall formed on the base portion and having a plurality of recesses for guiding the semiconductor light-emitting diodes to the preset positions, and a metal shielding layer formed on the base portion, wherein the metal shielding layer overlaps the barrier wall so that an electric field formed between the assembly electrodes is shielded.
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公开(公告)号:US10833210B2
公开(公告)日:2020-11-10
申请号:US14323986
申请日:2014-07-03
Applicant: LG ELECTRONICS INC.
Inventor: Hyungjin Kwon , Hyunjung Park , Junghoon Choi , Changseo Park
IPC: H01L31/0224 , H01L31/18 , H01L31/068 , H01L31/028
Abstract: Discussed is a solar cell including a semiconductor substrate, a tunneling layer formed on one surface of the semiconductor substrate, a first conductive semiconductor layer formed on a surface of the tunneling layer and a second conductive semiconductor layer formed on the surface the tunneling layer. A separation portion separates the first and second conductive semiconductor layers from each other, and is formed on the surface of the tunneling layer at a location corresponding to at least a portion of a boundary between the first and second conductive semiconductor layers.
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公开(公告)号:US10784385B2
公开(公告)日:2020-09-22
申请号:US14341637
申请日:2014-07-25
Applicant: LG ELECTRONICS INC.
Inventor: Chulchae Choi , Changseo Park , Jinsung Kim , Jaewon Chang , Hyungseok Kim , Youngho Choe , Philwon Yoon
IPC: H01L31/0224 , H01L31/05 , H01L31/049 , H01L31/068
Abstract: A solar cell is disclosed. The solar cell includes a substrate of a first conductive type; a plurality of emitter layers having a second conductive type opposite the first conductive type, the plurality of emitter layers positioned in a first surface of the substrate and extended in a first direction in the first surface of the substrate; a plurality of surface field layers having the first conductive type more heavily doped than the substrate, the plurality of surface field layers positioned in the first surface of the substrate and extended in the first direction in the first surface of the substrate; a passivation layer positioned on the first surface of the substrate and including a plurality of first openings exposing portions of each of the plurality of surface field layers and a plurality of second openings exposing portions of each of the plurality of emitter layers; a plurality of first electrodes positioned in the plurality of first openings and contacting the plurality of surface field layers; a plurality of second electrodes positioned in the plurality of second openings and contacting the plurality of emitter layers; a plurality of first conductive members positioned on the plurality of first electrodes; and a plurality of second conductive members positioned on the plurality of second electrodes.
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18.
公开(公告)号:US10707377B2
公开(公告)日:2020-07-07
申请号:US16415583
申请日:2019-05-17
Applicant: LG ELECTRONICS INC.
Inventor: Junghoon Kim , Changseo Park , Bongchu Shim , Byoungkwon Cho , Hyunwoo Cho
Abstract: The present disclosure relates a display device including a semiconductor light emitting device, and a substrate having a receiving groove in which the semiconductor light emitting device is accommodated, wherein the semiconductor light emitting device includes a first conductive semiconductor layer, a second conductive semiconductor layer disposed at an upper portion of the first conductive semiconductor layer, a first conductive electrode disposed on the first conductive semiconductor layer, and a second conductive electrode disposed on the second conductive semiconductor layer, and spaced apart from the first conductive electrode along a horizontal direction, wherein when the semiconductor light emitting device is assembled into the receiving groove, the first conductive semiconductor layer has an asymmetrical shape with respect to at least one direction so that the first conductive electrode and the second conductive electrode are arranged at preset positions.
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公开(公告)号:US10446697B2
公开(公告)日:2019-10-15
申请号:US15443331
申请日:2017-02-27
Applicant: LG ELECTRONICS INC.
Inventor: Changseo Park , Yoonsil Jin , Youngho Choe
IPC: H01L31/0216 , H01L31/0224 , H01L31/068 , H01L31/18
Abstract: A bifacial solar cell includes a substrate of an n-type; an emitter layer positioned on a first surface of the substrate; a plurality of first electrodes locally positioned on the emitter layer and electrically connected to the emitter layer; a first passivation layer positioned on the emitter layer; a silicon oxide layer formed at an interface between the first passivation layer and the emitter layer, the silicon oxide layer having a thickness of about 1 nm to 3 nm; a first anti-reflection layer positioned on the first passivation layer; a plurality of back surface field layers locally positioned on a second surface of the substrate; a plurality of second electrodes respectively positioned on the plurality of back surface field layers and electrically connected to the plurality of back surface field layers; and a second passivation layer positioned on the second surface of the substrate.
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公开(公告)号:US20150007879A1
公开(公告)日:2015-01-08
申请号:US14323986
申请日:2014-07-03
Applicant: LG ELECTRONICS INC.
Inventor: Hyungjin Kwon , Hyunjung Park , Junghoon Choi , Changseo Park
IPC: H01L31/0224 , H01L31/028 , H01L31/18
Abstract: Discussed is a solar cell including a semiconductor substrate, a tunneling layer formed on one surface of the semiconductor substrate, a first conductive semiconductor layer formed on a surface of the tunneling layer and a second conductive semiconductor layer formed on the surface the tunneling layer. A separation portion separates the first and second conductive semiconductor layers from each other, and is formed on the surface of the tunneling layer at a location corresponding to at least a portion of a boundary between the first and second conductive semiconductor layers.
Abstract translation: 讨论了包括半导体衬底,形成在半导体衬底的一个表面上的隧道层的太阳能电池,形成在隧道层的表面上的第一导电半导体层和形成在隧道层的表面上的第二导电半导体层。 分离部分将第一和第二导电半导体层彼此分离,并且在与第一和第二导电半导体层之间的边界的至少一部分相对应的位置处形成在隧道层的表面上。
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