公开(公告)号：US11250610B2

公开(公告)日：2022-02-15

申请号：US17006253

申请日：2020-08-28

Applicant: Intel Corporation

Inventor： Uzi Sarel ,  Ehud Cohen ,  Tomer Schwartz ,  Amitai Armon ,  Yahav Shadmiy ,  Itamar Ben-Ari ,  Amit Bleiweiss ,  Lev Faivishevsky ,  Tomer Bar-On ,  Yaniv Fais ,  Jacob Subag ,  Michael Behar ,  Guy Jacob ,  Gal Leibovich ,  Jeremie Dreyfuss

IPC: G06N3/04 ,  G06N3/08 ,  G06N3/02 ,  G06T15/00 ,  G06N3/063

Abstract: In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

公开(公告)号：US10467795B2

公开(公告)日：2019-11-05

申请号：US15482724

申请日：2017-04-08

Applicant: Intel Corporation

Inventor： Uzi Sarel ,  Ehud Cohen ,  Tomer Schwartz ,  Amitai Armon ,  Yahav Shadmiy ,  Itamar Ben-Ari ,  Amit Bleiweiss ,  Lev Faivishevsky ,  Tomer Bar-On ,  Yaniv Fais ,  Jacob Subag ,  Michael Behar ,  Guy Jacob ,  Gal Leibovich ,  Jeremie Dreyfuss

IPC: G06N3/04 ,  G06N3/08 ,  G06N3/02 ,  G06T15/00 ,  G06N3/063

Abstract: In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

公开(公告)号：US20180293758A1

公开(公告)日：2018-10-11

申请号：US15482725

申请日：2017-04-08

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

公开(公告)号：US12131507B2

公开(公告)日：2024-10-29

申请号：US18191565

申请日：2023-03-28

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048 ,  G06N3/084 ,  G06N3/088 ,  H04N19/42 ,  H04N19/436

CPC classification number: G06T9/002 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048 ,  G06N3/084 ,  G06N3/088 ,  H04N19/42 ,  H04N19/436

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

公开(公告)号：US20240104916A1

公开(公告)日：2024-03-28

申请号：US18519674

申请日：2023-11-27

Applicant: Intel Corporation

Inventor： Haim Barad ,  Barak Hurwitz ,  Uzi Sarel ,  Eran Geva ,  Eli Kfir ,  Moshe Island

IPC: G06V10/82 ,  G06F30/33 ,  G06N3/04 ,  G06V10/44 ,  G06V10/94

CPC classification number: G06V10/82 ,  G06F30/33 ,  G06N3/04 ,  G06V10/454 ,  G06V10/955

Abstract: Systems, apparatuses and methods may provide for technology that processes an inference workload in a first subset of layers of a neural network that prevents or inhibits data dependent branch operations, conducts an exit determination as to whether an output of the first subset of layers satisfies one or more exit criteria, and selectively bypasses processing of the output in a second subset of layers of the neural network based on the exit determination. The technology may also speculatively initiate the processing of the output in the second subset of layers while the exit determination is pending. Additionally, when the inference workloads include a plurality of batches, the technology may mask one or more of the plurality of batches from processing in the second subset of layers.

公开(公告)号：US20230316589A1

公开(公告)日：2023-10-05

申请号：US18191565

申请日：2023-03-28

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00 ,  H04N19/42 ,  H04N19/436 ,  G06N3/084 ,  G06N3/088 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048

CPC classification number: G06T9/002 ,  H04N19/42 ,  H04N19/436 ,  G06N3/084 ,  G06N3/088 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

公开(公告)号：US11600035B2

公开(公告)日：2023-03-07

申请号：US17669126

申请日：2022-02-10

Applicant: Intel Corporation

Inventor： Uzi Sarel ,  Ehud Cohen ,  Tomer Schwartz ,  Amitai Armon ,  Yahav Shadmiy ,  Itamar Ben-Ari ,  Amit Bleiweiss ,  Lev Faivishevsky ,  Tomer Bar-On ,  Yaniv Fais ,  Jacob Subag ,  Michael Behar ,  Guy Jacob ,  Gal Leibovich ,  Jeremie Dreyfuss

IPC: G06N3/04 ,  G06N3/08 ,  G06N3/063 ,  G06T15/00 ,  G06N3/02

Abstract: In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

公开(公告)号：US11238338B2

公开(公告)日：2022-02-01

申请号：US15494887

申请日：2017-04-24

Applicant: Intel Corporation

Inventor： Lev Faivishevsky ,  Tomer Bar-On ,  Yaniv Fais ,  Jacob Subag ,  Jeremie Dreyfuss ,  Amit Bleiweiss ,  Tomer Schwartz ,  Raanan Yonatan Yehezkel Rohekar ,  Michael Behar ,  Amital Armon ,  Uzi Sarel

IPC: G06N3/08 ,  G06N20/00 ,  G06N20/10

Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.

公开(公告)号：US10762685B2

公开(公告)日：2020-09-01

申请号：US16670749

申请日：2019-10-31

Applicant: Intel Corporation

Inventor： Uzi Sarel ,  Ehud Cohen ,  Tomer Schwartz ,  Amitai Armon ,  Yahav Shadmiy ,  Itamar Ben-Ari ,  Amit Bleiweiss ,  Lev Faivishevsky ,  Tomer Bar-On ,  Yaniv Fais ,  Jacob Subag ,  Michael Behar ,  Guy Jacob ,  Gal Leibovich ,  Jeremie Dreyfuss

IPC: G06N3/02 ,  G06N3/08 ,  G06N3/063 ,  G06T15/00 ,  G06N3/04

Abstract: In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

公开(公告)号：US20200143579A1

公开(公告)日：2020-05-07

申请号：US16670749

申请日：2019-10-31

Applicant: Intel Corporation

Inventor： Uzi Sarel ,  Ehud Cohen ,  Tomer Schwartz ,  Amitai Armon ,  Yahav Shadmiy ,  Itamar Ben-Ari ,  Amit Bleiweiss ,  Lev Faivishevsky ,  Tomer Bar-On ,  Yaniv Fais ,  Jacob Subag ,  Michael Behar ,  Guy Jacob ,  Gal Leibovich ,  Jeremie Dreyfuss

IPC: G06T15/00 ,  G06N3/02 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08

Abstract: In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.