-
公开(公告)号:US20230153375A1
公开(公告)日:2023-05-18
申请号:US18155762
申请日:2023-01-18
Applicant: Industrial Technology Research Institute
Inventor: Chih-Sheng Lin , Jian-Wei Su , Tuo-Hung Hou , Sih-Han Li , Fu-Cheng Tsai , Yu-Hui Lin
IPC: G06F17/16 , G11C11/412
CPC classification number: G06F17/16 , G11C11/412
Abstract: A computing in memory (CIM) cell includes a memory cell circuit, a first semiconductor element, a second semiconductor element, a third semiconductor element, and a fourth semiconductor element. A first terminal of the first semiconductor element receives a bias voltage. A control terminal of the first semiconductor element is coupled to a computing word-line. A control terminal of the second semiconductor element is coupled to a first data node in the memory cell circuit. A second terminal of the third semiconductor element is adapted to receive a reference voltage. A control terminal of the third semiconductor element receives an inverted signal of the computing word-line. A first terminal of the fourth semiconductor element is coupled to a first computing bit-line. A second terminal of the fourth semiconductor element is coupled to a second computing bit-line.
-
公开(公告)号:US11625588B2
公开(公告)日:2023-04-11
申请号:US16809522
申请日:2020-03-04
Applicant: Industrial Technology Research Institute
Inventor: Tuo-Hung Hou , Shyh-Shyuan Sheu , Jeng-Hua Wei , Heng-Yuan Lee , Ming-Hung Wu
Abstract: A neuron circuit and an artificial neural network chip are provided. The neuron circuit includes a memristor and an integrator. The memristor generates a pulse train having an oscillation frequency when an applied voltage exceeds a predetermined threshold. The integrator is connected in parallel to the memristor for receiving and accumulating input pulses transmitted by a previous layer network at different times, and driving the memristor to transmit the pulse train to a next layer network when a voltage of the accumulated input pulses exceeds the predetermined threshold.
-