公开(公告)号：US20150301917A1

公开(公告)日：2015-10-22

申请号：US14754011

申请日：2015-06-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Zehan Cui ,  Mingyu Chen ,  Licheng Chen ,  Mingyang Chen

IPC: G06F11/30 ,  G06F13/16

CPC classification number: G06F11/3037 ,  G06F11/3027 ,  G06F11/3452 ,  G06F11/3466 ,  G06F12/10 ,  G06F12/12 ,  G06F13/1663 ,  G06F2201/815 ,  G06F2201/88

Abstract: A memory monitoring method and a computing system. The computing system includes a processor, a memory and a monitor. The monitor obtains memory unit access information and process information of the computer system. The memory unit access information includes the number of access times of each memory unit of the memory. The process information includes information about a mapping relationship between a virtual address and a physical address of each memory units accessed by the current running process. After generating monitoring information, which includes the frequency at which the current running process accesses each memory unit, according to the memory unit access information and the process information, the monitor feeds the monitoring information back to the processor. Thus, the processor can perform memory management according to the monitoring information.

Abstract translation: 内存监控方法和计算系统。 计算系统包括处理器，存储器和监视器。 监视器获取计算机系统的存储单元访问信息和处理信息。 存储器单元访问信息包括存储器的每个存储器单元的访问次数。 处理信息包括关于由当前运行进程访问的每个存储器单元的虚拟地址和物理地址之间的映射关系的信息。 在产生包括当前运行进程访问每个存储单元的频率的监视信息之后，根据存储器单元访问信息和处理信息，监视器将监视信息反馈给处理器。 因此，处理器可以根据监视信息执行存储器管理。

公开(公告)号：US20200150872A1

公开(公告)日：2020-05-14

申请号：US16744795

申请日：2020-01-16

Applicant: Huawei Technologies Co., Ltd.

Inventor： Zehan Cui ,  Mingyu Chen ,  Yao Liu ,  Yuan Ruan

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/42 ,  G06F12/06

Abstract: In a method for accessing an extended memory, after receiving a first memory access request from a processor system in a computer, an extended memory controller sends a read request for obtaining to-be-accessed data to the extended memory and return, to the processor system, a first response message indicating the to-be-accessed data has not been obtained. The extended memory controller writes the to-be-accessed data into a data buffer after receiving the to-be-accessed data returned by the extended memory. After receiving, from the processor system, a second memory access request comprising a second access address, the extended memory controller returns, to the processor system, the to-be-accessed data in the data buffer in response to the second memory access request, wherein the second access address is different from the first access address and points to the physical address of the to-be-accessed data.

公开(公告)号：US20170148422A1

公开(公告)日：2017-05-25

申请号：US15426356

申请日：2017-02-07

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Yongbing Huang ,  Mingyu Chen ,  Zehan Cui ,  Shihai Xiao

IPC: G09G5/395 ,  G09G5/00

CPC classification number: G09G5/395 ,  G09G3/3611 ,  G09G3/3688 ,  G09G5/399 ,  G09G2310/04 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435 ,  G09G2360/18

Abstract: A refresh control method and apparatus of a display device are disclosed, where the method includes: (201) periodically generating, a first refresh signal, and outputting an image frame for display that is stored in a frame buffer to a display panel; and (202) generating, a second refresh signal when determining that the image frame for display that is stored in the frame buffer changes, and outputting the image frame for display that is stored in the frame buffer to the display panel. A generation frequency of the second refresh signal is far less than a frequency required to ensure timely display of an image frame. In addition, an operation of refreshing an image frame is triggered by using an event, which may ensure timely display of the image frame, and avoid an unnecessary refresh operation, so as to reduce system resource consumption and memory consumption.

公开(公告)号：US09632938B2

公开(公告)日：2017-04-25

申请号：US14680262

申请日：2015-04-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Mingyang Chen ,  Mingyu Chen ,  Zehan Cui ,  Licheng Chen

IPC: G06F12/08 ,  G06F12/0862 ,  G06F17/30 ,  G06F12/0866

CPC classification number: G06F12/0862 ,  G06F12/0866 ,  G06F17/30132 ,  G06F2212/1024 ,  G06F2212/312 ,  G06F2212/602 ,  G06F2212/6022 ,  G06F2212/6028

Abstract: A method and an apparatus for pushing memory data from a memory to a push destination storage used to store data prefetched by a central processing unit (CPU) in a computing system are disclosed. In the method, a memory controller of the computing system periodically generates a push command according to a push period. Then the memory controller acquires a push parameter of to-be-pushed data according to the push command and sends at least one memory access request to memory according to the push parameter, where the at least one memory access request is used to request the to-be-pushed data from the memory. After receiving the to-be-pushed data that is sent according to the at least one memory access request by the memory, the memory controller buffers the to-be-pushed data and pushes the to-be-pushed data from the data buffer to the push destination storage.

公开(公告)号：US20170075818A1

公开(公告)日：2017-03-16

申请号：US15343693

申请日：2016-11-04

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Yao Liu ,  Yongbing Huang ,  Mingyu Chen ,  Zehan Cui ,  Licheng Chen ,  Yuan Ruan

IPC: G06F12/1027 ,  G06F12/1009 ,  G06F3/06

CPC classification number: G06F12/1027 ,  G06F3/0608 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0652 ,  G06F3/0664 ,  G06F3/0685 ,  G06F12/1009 ,  G06F2212/1024 ,  G06F2212/684

Abstract: A memory management method and a device, where the method includes: receiving a memory access request, where the memory access request carries a virtual address; determining a page fault type of the virtual address if finding, in a translation lookaside buffer TLB and a memory, no page table entry corresponding to the virtual address; allocating a corresponding page to the virtual address if the page fault type of the virtual address is a blank-page-caused page fault, where the blank-page-caused page fault means that no corresponding page is allocated to the virtual address; and updating the page table entry corresponding to the virtual address to the memory and the TLB. The memory manager does not generate a page fault when a blank-page-caused page fault occurs, but allocates a corresponding page to the virtual address. Therefore, a quantity of occurrences of the page fault is reduced, thereby improving memory management efficiency.

Abstract translation: 一种存储器管理方法和装置，其中所述方法包括：接收存储器访问请求，其中所述存储器访问请求携带虚拟地址; 如果在翻译后备缓冲器TLB和存储器中找到与虚拟地址相对应的页表条目，则确定虚拟地址的页面错误类型; 如果虚拟地址的页面错误类型是由空白页引起的页面错误，其中由空白页引起的页面错误意味着没有对应的页面被分配给虚拟地址，则将对应的页面分配给虚拟地址; 以及将与虚拟地址相对应的页表条目更新到存储器和TLB。 当出现空白页引起的页面错误时，内存管理器不会生成页面错误，但会将相应的页面分配给虚拟地址。 因此，页面错误的发生量减少，从而提高存储器管理效率。

公开(公告)号：US20150006841A1

公开(公告)日：2015-01-01

申请号：US14335029

申请日：2014-07-18

Applicant: Huawei Technologies Co., Ltd.

Inventor： Mingyu Chen ,  Yuan Ruan ,  Zehan Cui ,  Licheng Chen ,  Yongbing Huang ,  Mingyang Chen

IPC: G06F13/16

CPC classification number: G06F13/1673 ,  G06F13/4239

Abstract: A message-based memory access apparatus and an access method thereof are disclosed, The message-based memory access apparatus includes: a message-based command bus, configured to transmit a message-based memory access instruction generated by the CPU to instruct a memory system to perform a corresponding operation; a message-based memory controller, configured to package a CPU request into a message packet and sent the packet to a storage module, and parse a message packet returned by the storage module and return data to the CPU; a message channel, configured to transmit a request message packet and a response message packet; and the storage module, including a buffer scheduler, and configured to receive the request packet from the message-based memory controller and process the corresponding request.

Abstract translation: 公开了一种基于消息的存储器访问装置及其访问方法，基于消息的存储器访问装置包括：基于消息的命令总线，被配置为发送由CPU生成的基于消息的存储器访问指令，以指示存储器系统 执行相应的操作; 基于消息的存储器控​​制器，被配置为将CPU请求打包到消息分组中并将所述分组发送到存储模块，并且解析由所述存储模块返回的消息分组并将数据返回到所述CPU; 消息信道，被配置为发送请求消息分组和响应消息分组; 以及所述存储模块，包括缓冲器调度器，并且被配置为从所述基于消息的存储器控​​制器接收所述请求分组并处理相应的请求。

公开(公告)号：US10545672B2

公开(公告)日：2020-01-28

申请号：US15788990

申请日：2017-10-20

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Zehan Cui ,  Mingyu Chen ,  Yao Liu ,  Yuan Ruan

IPC: G06F3/06

Abstract: A method for accessing an extended memory, a device, and a system are disclosed. According to the method, after receiving a first memory access requests from a processor system in a computer, an extended memory controller sends a read request for obtaining to-be-accessed data to the extended memory and return, to the processor system, a first response message indicating the to-be-accessed data has not been obtained. The extended memory controller writes the to-be-accessed data into a data buffer after receiving the to-be-accessed data returned by the extended memory. After receiving, from the processor system, a second memory access request comprising a second access address, the extended memory controller returns, to the processor system, the to-be-accessed data in the data buffer in response to the second memory access request, wherein the second access address is different from the first access address and points to the physical address of the to-be-accessed data.

公开(公告)号：US10007599B2

公开(公告)日：2018-06-26

申请号：US15373888

申请日：2016-12-09

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Zehan Cui ,  Mingyu Chen ,  Yongbing Huang

IPC: G06F12/00 ,  G06F12/02 ,  G11C11/406 ,  G11C11/4091 ,  G11C11/4096 ,  G06F3/06 ,  G06F12/1009

CPC classification number: G06F12/023 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0665 ,  G06F3/0673 ,  G06F12/1009 ,  G06F2212/1016 ,  G06F2212/152 ,  G06F2212/20 ,  G06F2212/657 ,  G11C11/40611 ,  G11C11/40618 ,  G11C11/40622 ,  G11C11/4091 ,  G11C11/4096

Abstract: A method for refreshing a dynamic random access memory DRAM and a computer system are provided. When an address of a refresh unit in a DRAM and refresh information of the refresh unit are acquired, the address of the refresh unit and the refresh information of the refresh unit are encapsulated as a DRAM access request, where the refresh unit is storage space on which one time of refresh is performed in the DRAM, and the refresh information of the refresh unit includes a refresh cycle of the refresh unit. Then, the address and the refresh information of the refresh unit are written into refresh data space using the DRAM access request, where the refresh data space is storage space that is preset in the DRAM and that is used for storing an address of at least one refresh unit and refresh information of the at least one refresh unit.

公开(公告)号：US20180039424A1

公开(公告)日：2018-02-08

申请号：US15788990

申请日：2017-10-20

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Zehan Cui ,  Mingyu Chen ,  Yao Liu ,  Yuan Ruan

IPC: G06F3/06

Abstract: A method for accessing an extended memory, a device, and a system are disclosed. According to the method, after receiving a first memory access requests from a processor system in a computer, an extended memory controller sends a read request for obtaining to-be-accessed data to the extended memory and return, to the processor system, a first response message indicating the to-be-accessed data has not been obtained. The extended memory controller writes the to-be-accessed data into a data buffer after receiving the to-be-accessed data returned by the extended memory. After receiving, from the processor system, a second memory access request comprising a second access address, the extended memory controller returns, to the processor system, the to-be-accessed data in the data buffer in response to the second memory access request, wherein the second access address is different from the first access address and points to the physical address of the to-be-accessed data.

公开(公告)号：US09870327B2

公开(公告)日：2018-01-16

申请号：US14335029

申请日：2014-07-18

Applicant: Huawei Technologies Co., Ltd.

Inventor： Mingyu Chen ,  Yuan Ruan ,  Zehan Cui ,  Licheng Chen ,  Yongbing Huang ,  Mingyang Chen

IPC: G06F13/16 ,  G06F13/42

CPC classification number: G06F13/1673 ,  G06F13/4239

Abstract: A message-based memory access apparatus and an access method thereof are disclosed, The message-based memory access apparatus includes: a message-based command bus, configured to transmit a message-based memory access instruction generated by the CPU to instruct a memory system to perform a corresponding operation; a message-based memory controller, configured to package a CPU request into a message packet and sent the packet to a storage module, and parse a message packet returned by the storage module and return data to the CPU; a message channel, configured to transmit a request message packet and a response message packet; and the storage module, including a buffer scheduler, and configured to receive the request packet from the message-based memory controller and process the corresponding request.