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11.发明授权公开(公告)号：US12237422B2
公开(公告)日：2025-02-25
申请号：US17765238
申请日：2021-05-20
Inventor： Qinghe Wang , Tongshang Su , Jun Wang , Yongchao Huang , Haitao Wang , Ning Liu , Jun Cheng , Yingbin Hu
IPC: H01L29/786 , G11C19/28 , H01L29/66
Abstract: A thin film transistor, including: at least one active layer pattern including a first conductive pattern, a second conductive pattern, and a semiconductor pattern; a gate on a side of the active layer pattern; a first electrode and a second electrode on a side of the gate away from the active layer pattern, and respectively electrically connected with the first conductive pattern and the second conductive pattern, a conductive shielding pattern is provided corresponding to the semiconductor pattern in at least one active layer pattern, the conductive shielding pattern is on a side of the semiconductor pattern away from the gate and is electrically connected with the first electrode, and a buffer layer is between the conductive shielding pattern and the semiconductor pattern; an orthographic projection of the conductive shielding pattern on a plane where the semiconductor pattern corresponding thereto is located at least partially covers the semiconductor pattern corresponding.
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公开(公告)号：US20240276768A1
公开(公告)日：2024-08-15
申请号：US18042297
申请日：2022-04-07
Inventor： Ning Liu , Chunjie Xu , Xuehai Gui , Bin Zhou , Liangchen Yan
IPC: H10K59/121 , H10K59/12 , H10K59/131 , H10K59/80
CPC classification number: H10K59/1213 , H10K59/1201 , H10K59/1216 , H10K59/131 , H10K59/8792
Abstract: A display substrate includes: a plurality of pixel units each including a plurality of sub-pixels, wherein each sub-pixel includes a light emitting element and a pixel driving circuit; a base substrate, a functional layer, a light-shielding layer, a buffer layer, an active layer and a gate electrode layer arranged in sequence; a first via hole penetrating the buffer layer; and a signal line arranged on a side of the buffer layer away from the base substrate. The functional layer of the pixel driving circuit is electrically connected to the signal line through the first via hole. A projection of the light-shielding layer on the base substrate and a projection of the functional layer on the base substrate form an overlap region, and a projection of the first via hole on the base substrate is located in the overlap region.
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公开(公告)号：US11672149B2
公开(公告)日：2023-06-06
申请号：US16910766
申请日：2020-06-24
Inventor： Guangyao Li , Dongfang Wang , Jun Wang , Haitao Wang , Qinghe Wang , Ning Liu , Wei Li , Yingbin Hu , Yang Zhang
IPC: H10K59/131 , H10K71/70 , H10K71/00 , H10K102/00 , H01L27/32 , H01L51/00 , H01L51/56
CPC classification number: H01L27/3276 , H01L51/0031 , H01L51/56 , H01L2251/5392 , H01L2251/568
Abstract: The present disclosure provides an OLED display panel and a method for detecting the OLED display panel, and a display device. The OLED display panel includes a base substrate including a display area and a non-display area surrounding the display area and having a first region adjacent to the display area. The display area includes a drive signal line and a power supply voltage signal line both extending from the display area to the first region. The drive signal line includes, in the first region, a first section of wiring at an anode layer, the power supply voltage signal line includes, in the first region, a second section of wiring at a gate metal layer, and parts of the drive signal line and the power supply voltage signal line in the display area are located at a source-drain metal layer.
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公开(公告)号：US11559592B2
公开(公告)日：2023-01-24
申请号：US16442860
申请日：2019-06-17
Inventor： Guangyao Li , Luke Ding , Leilei Cheng , Yingbin Hu , Jingang Fang , Ning Liu , Qinghe Wang , Dongfang Wang , Liangchen Yan
IPC: A61L2/03 , C01B32/182
Abstract: A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.
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15.发明授权公开(公告)号：US11335710B2
公开(公告)日：2022-05-17
申请号：US16936447
申请日：2020-07-23
Inventor： Qinghe Wang , Tongshang Su , Yongchao Huang , Yingbin Hu , Yang Zhang , Haitao Wang , Ning Liu , Guangyao Li , Zheng Wang , Yu Ji , Jinliang Hu , Wei Song , Jun Cheng , Liangchen Yan
Abstract: A thin film transistor, a display panel and a preparation method thereof and a display apparatus are provided. The thin film transistor includes: a substrate; a gate metal located on a side of the substrate; a gate insulating layer located on a side of the gate metal away from the substrate; an active layer located on a side of the gate insulating layer away from the substrate; a first metal oxide and a second metal oxide which are located on a side of the active layer away from the substrate and are arranged on a same layer; and a source metal and a drain metal which are located on sides of the first metal oxide and the second metal oxide away from the substrate and are arranged in a same layer.
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Patent Agency Ranking
16.发明授权公开(公告)号：US11177296B2
公开(公告)日：2021-11-16
申请号：US16644261
申请日：2019-04-17
Inventor： Ning Liu
Abstract: An array substrate, a display device, a thin film transistor, and a method for manufacturing an array substrate are disclosed. The array substrate includes a base substrate, an active layer, and a cover layer. The active layer is on the base substrate, the cover layer is on a side, away from the base substrate, of the active layer and covers the array substrate, the cover layer includes a metal conductive portion and a transparent insulating metal oxide portion, the metal conductive portion and the transparent insulating metal oxide portion include an identical metal element, and the metal conductive portion is electrically connected to the active layer.
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公开(公告)号：US20210066353A1
公开(公告)日：2021-03-04
申请号：US16928562
申请日：2020-07-14
Inventor： Tongshang Su , Dongfang Wang , Jun Liu , Qinghe Wang , Jun Wang , Ning Liu , Guangyao Li
IPC: H01L27/12 , H01L23/552
Abstract: An array substrate and a display device are provided in embodiments of the present disclosure. The array substrate includes a base substrate, a buffer layer, an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a source-drain electrode electrically conductive layer, a passivation layer, and a first light shielding layer. The first light shielding layer is disposed on a side of the passivation layer facing away from the interlayer insulating layer. An orthographic projection of the first light shielding layer on the base substrate at least partially overlaps with an orthographic projection of the active layer on the base substrate, and the first light shielding layer is formed by a photoresist material.
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18.发明授权公开(公告)号：US10777683B2
公开(公告)日：2020-09-15
申请号：US16403860
申请日：2019-05-06
Inventor： Yang Zhang , Luke Ding , Bin Zhou , Haitao Wang , Ning Liu , Jingang Fang , Yongchao Huang , Liangchen Yan
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L27/32
Abstract: A thin film transistor, a method of manufacturing the same, an array substrate and a display panel are disclosed. The thin film transistor includes a light blocking layer, an electrode layer, and a combination layer, which are sequentially stacked. The electrode layer includes a gate electrode, a source electrode and a drain electrode which are separated from one another, and the gate electrode is located between the source electrode and the drain electrode. The light blocking layer includes a first portion of which an orthogonal projection is located between an orthogonal projection of the gate electrode and an orthogonal projection of the source electrode; and a second portion of which an orthogonal projection is located between the orthogonal projection of the gate and an orthogonal projection of the drain. The combination layer includes an active layer.
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公开(公告)号：US10475906B2
公开(公告)日：2019-11-12
申请号：US15512981
申请日：2016-09-06
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Tongshang Su , Shengping Du , Ning Liu , Dongfang Wang , Guangcai Yuan
IPC: H01L29/66 , H01L27/12 , H01L29/786
Abstract: A fabrication method of a thin film transistor, a fabrication method of an array substrate, a display panel, and a display device are provided. The fabrication method of the thin film transistor comprises: forming a gate electrode, a gate insulating layer and an oxide active layer; forming an inverted trapezoidal dissolution layer whose cross section is inverted trapezoidal on the oxide active layer, the inverted trapezoidal dissolution layer being soluble in an organic solvent; forming a source/drain layer on the oxide active layer, the gate insulating layer and the inverted trapezoidal dissolution layer, a thickness of the inverted trapezoidal dissolution layer being greater than a thickness of the source/drain layer; and dissolving and removing the inverted trapezoidal dissolution layer with the organic solvent and removing the source/drain layer on the inverted trapezoidal dissolution layer, to form a source electrode and a drain electrode.
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公开(公告)号：US20240395827A1
公开(公告)日：2024-11-28
申请号：US18273139
申请日：2022-08-30
Inventor： Ning Liu , Bin Zhou , Ce Zhao , Liangchen Yan
IPC: H01L27/12
Abstract: The present disclosure provides a display substrate, a manufacturing method and a display device. The display substrate includes a base substrate, a driving circuit layer and a light-emitting unit. The driving circuit layer includes a source/drain metal layer, the source/drain metal layer includes a source electrode, a drain electrode and an auxiliary electrode, the light-emitting unit includes a first electrode structure, a light-emitting layer and a second electrode structure, the display substrate further includes an auxiliary connection structure and a protection hole, an orthogonal projection of the auxiliary connection structure onto the base substrate is located within an orthogonal projection of the protection hole onto the base substrate, and a distance between a surface of the auxiliary connection structure away from the base substrate and the base substrate is less than a distance between a surface of the planarization layer away from the base substrate and the base substrate.
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