公开(公告)号：US20210398252A1

公开(公告)日：2021-12-23

申请号：US17462176

申请日：2021-08-31

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fenglong Song ,  Liu Liu ,  Tao Wang

IPC: G06T5/00 ,  G06T5/50 ,  G06N3/04

Abstract: This application provides an image denoising method and apparatus, and relates to the artificial intelligence field and specifically relates to the computer vision field. The method includes: performing resolution reduction processing on a to-be-processed image to obtain a plurality of images whose resolutions are lower than that of the to-be-processed image; extracting an image feature of a higher-resolution image based on an image feature of a lower-resolution image to obtain an image feature of the to-be-processed image; and performing denoising processing on the to-be-processed image based on the image feature of the to-be-processed image to obtain a denoised image. This application can improve an image denoising effect.

公开(公告)号：US10901640B2

公开(公告)日：2021-01-26

申请号：US15827746

申请日：2017-11-30

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fenglong Song ,  Guangfei Zhang ,  Tao Wang

IPC: G06F3/06 ,  G06F12/08 ,  G06F12/084 ,  G06F12/0895 ,  G06F12/1045

Abstract: A memory access system includes a memory, a controller, and a redundancy elimination unit. The memory is a multi-way set associative memory, and the redundancy elimination unit records M record items. Each record item is used to store a tag of a stored data block in one of storage sets. The controller determines a read data block and a target storage set of the read data block and sends a query message to the redundancy elimination unit. The query message carries a set identifier of the target storage set of the read data block and a tag of the read data block. The redundancy elimination unit determines a record item corresponding to the set identifier of the target storage set, matches the tag of the read data block with a tag of a stored data block in the record item corresponding to the target storage set of the read data block.

公开(公告)号：US20170351557A1

公开(公告)日：2017-12-07

申请号：US15686830

申请日：2017-08-25

Applicant: Huawei Technologies Co., Ltd.

Inventor： Weizhi Xu ,  Zhimin Tang ,  Zhimin Zhang ,  Fenglong Song

IPC: G06F9/52 ,  G06F12/14

CPC classification number: G06F9/526 ,  G06F9/52 ,  G06F12/1466

Abstract: Multiple lock assemblies are distributed on a chip, each lock assembly manage a lock application message for applying for a lock and a lock release message for releasing a lock that are sent by one small core. Specifically, embodiments include receiving a lock message sent by a small core, where the lock message carries a memory address corresponding to a lock requested by a first thread in the small core; calculating, using the memory address of the requested lock, a code number of a lock assembly to which the requested lock belongs; and sending the lock message to the lock assembly corresponding to the code number, to request the lock assembly to process the lock message.

公开(公告)号：US20160154590A1

公开(公告)日：2016-06-02

申请号：US15017081

申请日：2016-02-05

Applicant: Huawei Technologies Co., Ltd.

Inventor： Dongrui Fan ,  Fenglong Song ,  Da Wang ,  Xiaochun Ye

IPC: G06F3/06

CPC classification number: G06F3/0611 ,  G06F3/0656 ,  G06F3/0683 ,  G06F9/3824

Abstract: A memory access processing method and apparatus, and a system. The method includes receiving a memory access request sent by a processor, combining multiple memory access requests received within a preset time period to form a new memory access request, where the new memory access request includes a code bit vector corresponding to memory addresses. A first code bit identifier is configured for the code bits that are in the code bit vector and corresponding to the memory addresses accessed by the multiple memory access requests. The method further includes sending the new memory access request to a memory controller, so that the memory controller executes a memory access operation on a memory address corresponding to the first code bit identifier. The method effectively improves memory bandwidth utilization.

Abstract translation: 存储器访问处理方法和装置以及系统。 该方法包括接收由处理器发送的存储器访问请求，组合在预设时间段内接收到的多个存储器访问请求以形成新的存储器访问请求，其中新的存储器访问请求包括与存储器地址相对应的代码位向量。 第一码位标识符被配置用于处于码位向量中并对应于由多个存储器访问请求访问的存储器地址的码位。 该方法还包括将新的存储器访问请求发送到存储器控制器，使得存储器控制器对与第一代码位标识符相对应的存储器地址执行存储器访问操作。 该方法有效地提高了内存带宽利用率。

公开(公告)号：US20160019100A1

公开(公告)日：2016-01-21

申请号：US14872946

申请日：2015-10-01

Applicant: Huawei Technologies Co., Ltd.

Inventor： Weizhi Xu ,  Zhimin Tang ,  Zhimin Zhang ,  Fenglong Song

IPC: G06F9/52

CPC classification number: G06F9/526 ,  G06F9/52 ,  G06F12/1466

Abstract: Multiple lock assemblies are distributed on a chip, each lock assembly manage a lock application message for applying for a lock and a lock release message for releasing a lock that are sent by one small core. Specifically, embodiments include receiving a lock message sent by a small core, where the lock message carries a memory address corresponding to a lock requested by a first thread in the small core; calculating, using the memory address of the requested lock, a code number of a lock assembly to which the requested lock belongs; and sending the lock message to the lock assembly corresponding to the code number, to request the lock assembly to process the lock message.

Abstract translation: 多个锁组件分布在芯片上，每个锁组件管理用于应用锁的锁应用消息和用于释放由一个小核发送的锁的锁释放消息。 具体地，实施例包括接收由小核发送的锁定消息，其中锁定消息携带与小核心中的第一线程请求的锁相对应的存储器地址; 使用所请求的锁的存储器地址来计算所请求的锁所属的锁组件的代码号; 并将锁定消息发送到与代码号对应的锁组件，以请求锁组件处理锁消息。