公开(公告)号：US20140301534A1

公开(公告)日：2014-10-09

申请号：US13857624

申请日：2013-04-05

Applicant: GENERAL ELECTRIC COMPANY

Inventor： Naresh Kesavan Rao ,  James Wilson Rose ,  Christopher David Unger ,  Abdelaziz Ikhlef ,  Jonathan David Short

IPC: G01T1/20 ,  G01N23/04

CPC classification number: G01T1/247 ,  A61B6/42 ,  A61B6/4233 ,  H01L27/14661 ,  H01L27/14663

Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced. The co-location of the electronics next to or proximal to the photodetector array also enables/facilitates programmable pixel configuration for optimal image quality.

Abstract translation: 公开了改进的成像系统。 更具体地，本公开提供了一种用于成像系统的改进的图像传感器组件，该图像传感器组件具有集成的光电检测器阵列及其在相同基板上制造的相关联的数据采集电子装置。 通过将电子元件集成在与光电检测器阵列相同的基板上，由此降低了制造成本，并降低了互连复杂度。 由于光电二极管触点和相关联的电子器件都在相同的衬底/平面上，因此基本上消除了某些昂贵/耗时的处理技术。 此外，由于电子设备和光电检测器阵列之间的互连瓶颈基本上被消除/减少，所以电子器件靠近光电检测器阵列的共同定位提供了更精细的分辨率检测器组件。 靠近或接近光电检测器阵列的电子设备的共同位置也使得/促进可编程像素配置以获得最佳图像质量。

公开(公告)号：US10607929B2

公开(公告)日：2020-03-31

申请号：US16229049

申请日：2018-12-21

Applicant: General Electric Company

Inventor： Christopher James Kapusta ,  Kaustubh Ravindra Nagarkar ,  Arun Virupaksha Gowda ,  James Wilson Rose

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H05K1/18 ,  H01L23/538

Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

公开(公告)号：US09603574B2

公开(公告)日：2017-03-28

申请号：US14574050

申请日：2014-12-17

Applicant: GENERAL ELECTRIC COMPANY

Inventor： James Wilson Rose ,  Donna Marie Sherman ,  Jeffrey Scott Erlbaum

IPC: A61B6/03 ,  A61B6/00 ,  G10K11/32 ,  G01R33/34

CPC classification number: A61B6/00 ,  A61B6/032 ,  A61B6/035 ,  A61B6/42 ,  G01R33/34007 ,  G10K11/32

Abstract: The present disclosure relates to the fabrication of electrical components and, in particular to the use of a reconfigurable substrate to which a flexible circuit may be affixed. In certain embodiments, the reconfigurable substrate may be moved between different configurations, certain of which are suitable for fabrication and certain of which are suitable for operation.

公开(公告)号：US20150108357A1

公开(公告)日：2015-04-23

申请号：US14061531

申请日：2013-10-23

Applicant: General Electric Company

Inventor： James Wilson Rose ,  Oliver Richard Astley ,  Donna Marie Sherman ,  Jonathan David Short

IPC: H01L23/552 ,  G01T1/24

CPC classification number: H01L23/552 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.

Abstract translation: 在某些实施例中，提供了包括数字部分和模拟部分的混合信号集成电路。 提供覆盖混合信号集成电路的数字部分或模拟部分中的一个的屏蔽。 屏蔽限制信号在混合信号集成电路的数字部分和模拟部分之间的传播。