公开(公告)号：US20190286606A1

公开(公告)日：2019-09-19

申请号：US16265598

申请日：2019-02-01

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Kyuseung HAN ,  Hyeong Uk JANG ,  Sukho LEE ,  Jae-Jin LEE

IPC: G06F13/42

Abstract: Provided is a computing device. The computing device includes electronic circuits, and a network-on-chip configured to provide a communication channel between the electronic circuits. One of the electronic circuits is a processor. The network-on-chip includes a memory management unit for supporting a use of a virtual memory address of the processor.

公开(公告)号：US20190179397A1

公开(公告)日：2019-06-13

申请号：US16165878

申请日：2018-10-19

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sukho LEE ,  Jae-Jin LEE ,  Kyuseung HAN

IPC: G06F1/32 ,  G06F1/08 ,  G06F1/28 ,  G06T1/20

Abstract: Provided is a graphics processing unit and an operation method thereof. The graphics processing unit includes a plurality of cores in which a delay time between an input and an output decreases according to an increase of a temperature, a temperature monitoring and sorting circuit configured to monitor a temperature of each of the plurality of cores, and a controller configured to control a clock frequency and a power supply of the plurality of cores based on a drivable clock frequency of a core having the lowest temperature among temperatures of each of the plurality of monitored cores.