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公开(公告)号：US12047086B2
公开(公告)日：2024-07-23
申请号：US17980105
申请日：2022-11-03
Inventor： Paul M. Astrachan , Lingli Zhang , John L. Melanson , James Kelton
CPC classification number: H03M1/06 , H03M1/0607 , H03M1/0626 , H03M1/1023 , H03M1/66 , H03M1/74 , H03M1/80
Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps comprising a respective input resistance, and control circuitry configured to selectively enable and selectively disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter.
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公开(公告)号：US11387732B2
公开(公告)日：2022-07-12
申请号：US16916395
申请日：2020-06-30
Inventor： Eric J. King , Ajit Sharma , Lingli Zhang , Christian Larsen , Graeme G. Mackay
Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuity configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.
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公开(公告)号：US10476455B1
公开(公告)日：2019-11-12
申请号：US16057820
申请日：2018-08-08
Inventor： Paul Astrachan , Emmanuel Marchais , Lingli Zhang , Zhaohui He , Kyehyung Lee , Tejasvi Das , John L. Melanson
Abstract: A class-D amplifier system includes one or more pulse width modulation (PWM) output paths at least one of which includes one or more digital closed-loop PWM modulators (DCL-PWMM) in which at least one of the DCL_PWMM includes a digital integrator that provides an output value and receives a feedback value. The output value has an output resolution and the feedback value has a feedback resolution that is coarser than the output resolution. The output value is the sum of an integer multiple of the feedback resolution and a residue. Control logic decreases/increases the residue of the digital integrator toward an integer multiple of the feedback resolution over a plurality of clock cycles in response to a request to transition the class-D amplifier and forces an output of the DCL_PWMM to have an approximate 50% duty cycle after decreasing/increasing the residue over the plurality of clock cycles.
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公开(公告)号：US11735942B2
公开(公告)日：2023-08-22
申请号：US17130443
申请日：2020-12-22
Inventor： Graeme G. Mackay , Ajit Sharma , Jason W. Lawrence , Lingli Zhang
CPC classification number: H02J7/007182 , H02M3/04 , H01M10/44
Abstract: A power delivery system may include a power converter configured to electrically couple to a power source and further configured to supply electrical energy to one or more loads electrically coupled to an output of the power converter and control circuitry configured to monitor a first voltage derived from the power source, wherein the first voltage is indicative of a total power demanded by the power converter, and control a limit for a current supplied from the power source to the one or more loads based on comparison of the first voltage to a threshold voltage, wherein the threshold voltage is indicative of a point within a range of operation of the power converter at which the power converter delivers a maximum amount of power to the one or more loads.
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公开(公告)号：US11031867B2
公开(公告)日：2021-06-08
申请号：US16202463
申请日：2018-11-28
Inventor： Mikel Ash , Eric J. King , Lingli Zhang , Graeme G. Mackay
Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal and generating the slope compensation signal to have a compensation value of approximately zero at an end of a duty cycle of operation of the switch-mode power supply.
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Patent Agency Ranking
公开(公告)号：US10164590B2
公开(公告)日：2018-12-25
申请号：US15910774
申请日：2018-03-02
Inventor： Lingli Zhang , Yongjie Cheng , Lei Zhu , Christian Larsen , John L. Melanson
Abstract: An improved Class-D amplifier may include a digital PWM modulator that receives a digital audio signal and that provides a PWM signal as an input to an analog PWM modulator of the Class-D amplifier. A digital PWM modulator may be configured to receive a digital signal and to generate a first PWM signal based on the digital signal. A digital PWM driver may be coupled to the digital PWM modulator. The digital PWM driver may be configured to receive the first PWM signal and to generate a reference PWM signal based on the first PWM signal. An analog PWM modulator may be coupled to the digital PWM driver. The analog PWM modulator may be configured to receive the reference PWM signal and to generate an output PWM signal based on the reference PWM signal.
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公开(公告)号：US20180254757A1
公开(公告)日：2018-09-06
申请号：US15910774
申请日：2018-03-02
Inventor： Lingli Zhang , Frank Cheng , Lei Zhu , Christian Larsen , John L. Melanson
CPC classification number: H03F3/217 , H03F3/183 , H03F3/2171 , H03F3/2175 , H03F2200/03 , H03F2200/351
Abstract: An improved Class-D amplifier may include a digital PWM modulator that receives a digital audio signal and that provides a PWM signal as an input to an analog PWM modulator of the Class-D amplifier. A digital PWM modulator may be configured to receive a digital signal and to generate a first PWM signal based on the digital signal. A digital PWM driver may be coupled to the digital PWM modulator. The digital PWM driver may be configured to receive the first PWM signal and to generate a reference PWM signal based on the first PWM signal. An analog PWM modulator may be coupled to the digital PWM driver. The analog PWM modulator may be configured to receive the reference PWM signal and to generate an output PWM signal based on the reference PWM signal.
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公开(公告)号：US12009829B2
公开(公告)日：2024-06-11
申请号：US17980146
申请日：2022-11-03
Inventor： John L. Melanson , Lingli Zhang , Paul M. Astrachan , James Kelton
CPC classification number: H03M1/06 , H03M1/0607 , H03M1/0626 , H03M1/1023
Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member of the plurality of parallel taps is coupled between an input of the digital-to-analog converter and an input of the integrator, and control circuitry configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter, such that the control circuitry enables an even number of members at a time, with half of such enabled members in a first group and half of such enabled members in a second group.
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公开(公告)号：US10123143B2
公开(公告)日：2018-11-06
申请号：US15276437
申请日：2016-09-26
Inventor： Vamsikrishna Parupalli , Lingli Zhang , Jeremy Babcock , Marc L. Tarabbia
Abstract: Errors in measurements of a resistor to monitor current through a speaker may be corrected to improve the accuracy, performance, or quality of other signals affected by the measurement. Error may occur in the current measurement resulting from variations in measurements involving the resistor, such as errors based on the sense resistor's response to temperature or voltage differential. Correcting the measurement errors can prevent the overcurrent condition from occurring, and otherwise improve audio output from the speaker. Thus, a method for correcting measurements in a speaker monitoring circuit may include monitoring a current through a speaker by receiving a measurement that is correlated to the current output through the speaker; and correcting the measurement for one or more inaccuracies in the measurement.
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公开(公告)号：US20180091911A1
公开(公告)日：2018-03-29
申请号：US15276437
申请日：2016-09-26
Inventor： Vamsikrishna Parupalli , Lingli Zhang , Jeremy Babcock , Marc L. Tarabbia
CPC classification number: H04R29/001 , H04R3/007
Abstract: Errors in measurements of a resistor to monitor current through a speaker may be corrected to improve the accuracy, performance, or quality of other signals affected by the measurement. Error may occur in the current measurement resulting from variations in measurements involving the resistor, such as errors based on the sense resistor's response to temperature or voltage differential. Correcting the measurement errors can prevent the overcurrent condition from occurring, and otherwise improve audio output from the speaker. Thus, a method for correcting measurements in a speaker monitoring circuit may include monitoring a current through a speaker by receiving a measurement that is correlated to the current output through the speaker; and correcting the measurement for one or more inaccuracies in the measurement.
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