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公开(公告)号：US20200160768A1
公开(公告)日：2020-05-21
申请号：US16399510
申请日：2019-04-30
Applicant: BOE Technology Group Co., Ltd.
Inventor： Donghui WANG , Hong WANG , Lijun YUAN , Yanhui XI , Haoliang ZHENG , Yuxin BI
IPC: G09G3/20
Abstract: The present disclosure discloses a source driving circuit and a display panel. The source driving circuit includes a plurality of driving sub-circuits, and each of the plurality of driving sub-circuits includes: a driver, including a plurality of source channels; a plurality of switches, first terminals of the plurality of switches are electrically connected to a plurality of data lines of a display panel in one-to-one correspondence, wherein each of the plurality of source channels is electrically connected to second terminals of at least two of the plurality of switches; and a control line, electrically connected to control terminals of the plurality of switches. Sub-pixels corresponding to data lines that are electrically connected to a same source channel through the switches have the same polarity and the same color.
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公开(公告)号：US20180293956A1
公开(公告)日：2018-10-11
申请号：US15840757
申请日：2017-12-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing YAO , Seung-Woo HAN , Guangliang SHANG , Mingfu HAN , Haoliang ZHENG , Yun-Sik IM
Abstract: The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes a plurality of shift register units, a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines. The plurality of gate lines crossing the plurality of data lines defines a plurality of pixel regions. Each of the pixel regions is divided into a driving zone and a pixel unit zone. A plurality of the driving zones in a same column constitute at least one unit region and each of the shift register units is disposed in one of the unit regions to provide scanning signals to the gate line connected thereto.
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公开(公告)号：US20170270879A1
公开(公告)日：2017-09-21
申请号：US15501265
申请日：2016-07-01
Applicant: BOE TECHNOLOGY GROUP CO., LTD
Inventor： Mingfu HAN , Seungwoo HAN , Guangliang SHANG , Hyunsic CHOI , Xing YAO , Haoliang ZHENG , Xue DONG , Jungmok JUN , Yunsik IM
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G11C19/28
Abstract: The present disclosure provides a shift register, including: an input unit, an output control unit, a first pull-down unit, a second pull-down unit, a reset unit, and a pull-down control unit. The input unit comprises a control terminal connected to a signal input terminal, a first terminal connected to a first voltage terminal, and a second terminal connected to a first node. The output control unit comprises a control terminal connected to the first node, a first terminal connected to a first clock signal terminal, and a second terminal connected to a signal output terminal. The first pull-down unit comprises a control terminal connected to a second node, a first terminal connected to the first node, and a second terminal connected to a compensation signal terminal. The second pull-down unit comprises a control terminal connected to the compensation signal terminal, and a first terminal connected to the second node.
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公开(公告)号：US20160307641A1
公开(公告)日：2016-10-20
申请号：US15085117
申请日：2016-03-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Haoliang ZHENG , Guangliang SHANG
CPC classification number: G11C19/28 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286
Abstract: The present invention provides a shift register, a gate driving circuit and a display device. The shift register comprises an input unit, an output pull-up unit, a reset unit and an output maintaining unit, the input unit is connected with a signal input terminal, the reset unit and a pull-up control node, and the pull-up control node is a connection node between the input unit and the output pull-up unit; the output pull-up unit is connected with a first signal output terminal, a second signal output terminal, a first clock signal input terminal, the reset unit and the pull-up control node; the reset unit is connected with a reset signal input terminal, a low voltage power supply terminal, the input unit and the output pull-up unit; the output maintaining unit is connected with the first clock signal input terminal, the first signal output terminal and a control signal input terminal.
Abstract translation: 本发明提供一种移位寄存器，栅极驱动电路和显示装置。 移位寄存器包括输入单元，输出上拉单元，复位单元和输出保持单元，输入单元与信号输入端子，复位单元和上拉控制节点连接， 上拉控制节点是输入单元和输出上拉单元之间的连接节点; 输出上拉单元与第一信号输出端子，第二信号输出端子，第一时钟信号输入端子，复位单元和上拉控制节点连接; 复位单元与复位信号输入端子，低压电源端子，输入单元和输出上拉单元连接; 输出保持单元与第一时钟信号输入端子，第一信号输出端子和控制信号输入端子连接。
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15.发明公开公开(公告)号：US20240221608A1
公开(公告)日：2024-07-04
申请号：US17923690
申请日：2021-11-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Seungwoo HAN , Haoliang ZHENG , Dongni LIU , Li XIAO , Jiao ZHAO , Xiaorong CUI , Minghua XUAN
CPC classification number: G09G3/32 , G11C19/28 , G09G2300/0842 , G09G2300/0861 , G09G2310/0286 , G09G2310/08
Abstract: A shift register includes: an input circuit configured to receive an input signal; a first control circuit configured to control, in response to a second clock signal and a voltage at a second node, a voltage at the first node; a second control circuit configured to control, in response to a first clock signal, the second clock signal, and the voltage at the first node, a voltage at the second node, and control, in response to the second clock signal and the voltage at the first node, a voltage at the fifth node; and an output circuit configured to transmit, in response to an active level at the first node, a second power signal to an output signal terminal, and transmit, in response to an active level at the fifth node, the first power signal to the output signal terminal. All transistors included in the shift register are N-type transistors.
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Patent Agency Ranking
公开(公告)号：US20230360586A1
公开(公告)日：2023-11-09
申请号：US17634544
申请日：2021-04-15
Applicant: BOE Technology Group Co., Ltd.
Inventor： Li XIAO , Haoliang ZHENG , Minghua XUAN , Hao CHEN , Dongni LIU , Jiao ZHAO , Seungwoo HAN , Liang CHEN , Qi QI
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2310/0275 , G09G2310/0267 , G09G2320/0247 , G09G2320/0233 , G09G2310/0297
Abstract: Disclosed are a display panel, a control method for the same, and a display device. The display panel includes: M rows and N columns of pixel units, N current data lines sequentially arranged along a row direction, and N time-length data lines sequentially arranged along the row direction. Each pixel unit includes a pixel circuit, the pixel circuit including a current data terminal and a time-length data terminal. An ith column of the current data lines and an ith column of the time-length data lines are respectively located on two sides of an ith column of pixel units, the current data terminals of the pixel circuits of the ith column of pixel units are electrically connected to the ith column of the current data lines.
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公开(公告)号：US20230113488A1
公开(公告)日：2023-04-13
申请号：US17052526
申请日：2019-11-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiao ZHAO , Li XIAO , Minghua XUAN , Haoliang ZHENG , Dongni LIU , Jing LIU , Qi QI
IPC: G09G3/3291
Abstract: The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate of the present disclosure includes: a base substrate; and a plurality of pixel units arranged in an array, a plurality of signal lines and signal supply modules on the base substrate; wherein the signal supply module includes: a signal supply circuit and a redundant signal supply circuit; each of the signal supply modules is electrically coupled to at least one of the plurality of pixel units through at least one of the plurality of signal lines.
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公开(公告)号：US20230028984A1
公开(公告)日：2023-01-26
申请号：US17772951
申请日：2021-06-24
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang CHEN , Haoliang ZHENG , Hao CHEN , Minghua XUAN , Dongni LIU , Jiao ZHAO , Qi QI , Li XIAO
Abstract: A chip structure, a manufacturing method thereof, and a display device are provided. The chip structure comprises a substrate, a micro light-emitting diode and a drive transistor arranged on the substrate, wherein a first pole of the drive transistor is coupled to a first electrode of the micro light-emitting diode.
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公开(公告)号：US20220351683A1
公开(公告)日：2022-11-03
申请号：US17620398
申请日：2020-11-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Li XIAO , Haoliang ZHENG , Hao CHEN , Minghua XUAN , Dongni LIU , Seungwoo HAN , Liang CHEN , Jiao ZHAO , Xue DONG
IPC: G09G3/3258 , G09G3/3291
Abstract: A pixel circuit includes a driving circuit, a first control circuit and a second control circuit. The driving circuit is configured to receive a data signal in response to a scan signal, and generate, in response to a first enable signal, a driving signal according to a first voltage and the data signal. The first control circuit is configured to: receive a first input signal in response to a first control signal, and transmit a third input signal in response to the first input signal; and receive a second input signal in response to a second control signal, and transmit a second enable signal in response to the second input signal. The second control circuit is configured to transmit the driving signal to an element to be driven in response to one of the third input signal and the second enable signal.
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公开(公告)号：US20220293038A1
公开(公告)日：2022-09-15
申请号：US17530101
申请日：2021-11-18
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jiao ZHAO , Seungwoo HAN , Haoliang ZHENG , Minghua XUAN , Li XIAO , Dongni LIU , Liang CHEN , Hao CHEN
IPC: G09G3/32
Abstract: The present application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit is to be coupled to a to-be-driven element. The pixel circuit includes a first energy storage circuit, a driving circuit, a light-emitting control circuit, a data writing circuit, and a compensation control circuit. The compensation control circuit is configured to, under control of a third control signal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit.
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