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公开(公告)号：US20220327975A1
公开(公告)日：2022-10-13
申请号：US17434987
申请日：2020-12-28
Inventor： Yan YAN , Yu MA , Weitao CHEN , Xiaopeng CUI
Abstract: A shift register circuit includes a first pull-down control sub-circuit and a first noise reduction sub-circuit. The first pull-down control sub-circuit includes a first transistor and a second transistor, and a ratio of a width-to-length ratio of a channel of the second transistor to a width-to-length ratio of a channel of the first transistor is greater than 5:1. The first pull-down control sub-circuit transmits, in response to a first voltage signal received at a first voltage signal terminal, the first voltage signal to a first pull-down node through the first transistor, and transmits a second voltage signal received at a second voltage signal terminal to the first pull-down node through the second transistor under control of a voltage of a pull-up node. The first noise reduction sub-circuit transmits the second voltage signal to the pull-up node under control of a voltage of the first pull-down node.
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公开(公告)号：US20210247867A1
公开(公告)日：2021-08-12
申请号：US16980799
申请日：2019-11-04
IPC: G06F3/041 , H01L27/12 , G02F1/1343 , G02F1/1333 , G02F1/1362 , G02F1/1335
Abstract: The An array substrate includes a substrate, a gate line on the substrate, a sub-pixel, two data lines, a touch signal line, a functional electrode, and a touch electrode unit. The orthographic projection of the touch signal line on the substrate partially overlaps orthographic projection of an opening area of the sub-pixel on the substrate; the touch electrode unit is coupled to the touch signal line; the extension directions of the first and second sub-function electrode portions of the functional electrode are the same as that of the data line, the first/second sub-functional electrode portion is located on a first/second side of the sub-pixel opening area; along the extending direction of the gate line, a distance between the first/second sub-functional electrode portion and the touch signal line is smaller than a distance between the data line on the first/second side and the touch signal line.
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公开(公告)号：US20250166583A1
公开(公告)日：2025-05-22
申请号：US19028485
申请日：2025-01-17
IPC: G09G3/36 , G02F1/1333 , G02F1/1343 , G02F1/1362 , H02M7/537 , H03F3/45
Abstract: An array substrate has a display area and a bonding region. The display area includes a distal region, a proximal region, and a middle region therebetween. The array substrate includes a base, a common electrode located in the display area, a connecting lead disposed outside the distal region, a conductive frame at least partially surrounding the display area, and at least one first common signal line, at least one second common signal line and at least one third common signal line. The first common signal line, the second common signal line and the third common signal line are respectively coupled to portions of the common electrode located in the distal region, the proximal region and the middle region. The first common signal line is coupled to the connecting lead. The connecting lead and the portion of the common electrode located in the distal region are coupled to the conductive frame.
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公开(公告)号：US20250126891A1
公开(公告)日：2025-04-17
申请号：US18688052
申请日：2022-12-26
Inventor： Xiaoying LI , Zhixiao YAO , Weitao CHEN , Yu MA , Yan YAN , Xiaopeng CUI , Xiaoyi ZHENG , Xiao WANG , Zhiqiang MA , Bo LI
Abstract: The present disclosure relates to an array substrate, a display panel, and an electronic device. The array substrate includes a plurality of sub-pixel regions, a gate line layer, and a common electrode layer. Each sub-pixel region of the sub-pixel regions has two sub-pixel units disposed in a same row and two thin film transistors connected to the two sub-pixel units respectively. The gate line layer has gate lines and gate electrodes. Control electrodes of two thin film transistors of each sub-pixel region are respectively connected to two gate lines located on two ends of the sub-pixel region through corresponding gate electrodes.
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公开(公告)号：US20250077007A1
公开(公告)日：2025-03-06
申请号：US18284903
申请日：2023-02-21
Abstract: A display substrate, including: a substrate; and a plurality of data lines each extending in a first direction, a touch layer, and a plurality of touch signal lines, sequentially arranged away from the substrate, wherein the touch layer includes a plurality of touch electrodes configured to be multiplexed as common electrodes, and each touch electrode includes a plurality of touch sub-electrodes electrically connected to each other; wherein the touch sub-electrodes are arranged in an array along the first direction and a second direction, a first slit is between any two adjacent touch sub-electrodes along the second direction, and orthographic projections of the first slit and a corresponding data line on the substrate overlap each other; the touch signal lines are connected to the touch electrodes, and an orthographic projection of at least one touch signal line on the substrate covers the orthographic projection of the first slit on the substrate.
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Patent Agency Ranking
公开(公告)号：US20240015939A1
公开(公告)日：2024-01-11
申请号：US18372298
申请日：2023-09-25
Inventor： Yaya QI , Dianzheng DONG , Yan YAN , Xiao WANG , Xue WANG , Tingting WANG , Xiaoying LI , Zhiqiang MA
CPC classification number: H05K1/0259 , H05K9/0067 , H05K1/0215
Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
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公开(公告)号：US20230245609A1
公开(公告)日：2023-08-03
申请号：US17770415
申请日：2021-03-18
Inventor： Yan YAN , Xu WANG , Weitao CHEN , Yu MA , Zhiqiang MA , Shunsha LU
CPC classification number: G09G3/20 , G11C19/28 , G09G2310/0286 , G09G2320/02
Abstract: A shift register, a gate drive circuit and a display device. During forward scanning, the first input circuit supplies a signal of a first reference signal terminal to a first node in response to a signal of a first input signal terminal at an input phase, and the second input circuit supplies a signal of a second reference signal terminal to the first node in response to a signal of a second input signal terminal at a reset phase; and during reverse scanning, the second input circuit supplies the signal of the second reference signal terminal to the first node in response to the signal of the second input signal terminal at the input phase, and the first input circuit supplies the signal of the first reference signal terminal to the first node in response to the signal of the first input signal terminal at the reset phase.
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公开(公告)号：US20230237974A1
公开(公告)日：2023-07-27
申请号：US18191628
申请日：2023-03-28
IPC: G09G3/36 , G02F1/1343 , G02F1/1333 , G02F1/1362 , H02M7/537 , H03F3/45
CPC classification number: G09G3/3696 , G02F1/134345 , G02F1/133308 , G02F1/136286 , H02M7/537 , H03F3/45475 , G09G2310/0243 , G09G2310/0291 , G09G2320/0252
Abstract: An array substrate has a display area and a bonding region. The display area includes a distal region, a proximal region, and a middle region therebetween. The array substrate includes a base, a common electrode located in the display area, a connecting lead disposed outside the distal region, a conductive frame at least partially surrounding the display area, and at least one first common signal line, at least one second common signal line and at least one third common signal line. The first common signal line, the second common signal line and the third common signal line are respectively coupled to portions of the common electrode located in the distal region, the proximal region and the middle region. The first common signal line is coupled to the connecting lead. The connecting lead and the portion of the common electrode located in the distal region are coupled to the conductive frame.
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公开(公告)号：US20220320078A1
公开(公告)日：2022-10-06
申请号：US17424900
申请日：2020-10-28
Inventor： Tingting WANG , Yan YAN , Qi WANG , Li TIAN
Abstract: Provided is a display substrate including a substrate, wherein the substrate includes a display region and a peripheral region located at the periphery of the display region. A GOA circuit, a first common electrode lead, a first capacitor and at least one first ESD unit are provided in the peripheral region. The GOA circuit includes a plurality of GOA units and STV signal lines electrically connected to at least one GOA unit. The first common electrode lead is connected to the STV signal line through at least one first ESD unit. A first capacitor electrode of the first capacitor is connected to the STV signal line, and a second capacitor electrode of the first capacitor is connected to the first common electrode lead.
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公开(公告)号：US20220172692A1
公开(公告)日：2022-06-02
申请号：US17425204
申请日：2020-12-28
IPC: G09G3/36 , G02F1/1343 , G02F1/1362 , G02F1/1333 , H02M7/537 , H03F3/45
Abstract: An array substrate has a display area and a bonding region. The display area includes a distal region away from the bonding region. The array substrate includes a base, a common electrode located in the display area, and at least one first common signal line and at least one feedback signal line that are disposed on the base. The at least one first common signal line and the at least one feedback signal line are coupled to a portion of the common electrode located in the distal region, and extend to the bonding region to be coupled to a circuit board. A feedback signal line transmits a common voltage signal of the portion of the common electrode located in the distal region to the circuit board. A first common signal line transmits a first compensation common voltage signal to the portion of the common electrode located in the distal region.
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