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公开(公告)号:US20240371323A1
公开(公告)日:2024-11-07
申请号:US18247634
申请日:2022-06-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Weixing LIU , Zhiqiang XU , Jintao PENG , Chunfang ZHANG , Wanpeng TENG , Kai GUO , Jiao LI
IPC: G09G3/3233 , G09G3/20
Abstract: A pixel circuit includes a light emitting element, a first energy storage circuit, a first driving circuit, a second driving circuit, a first driving control circuit, a second driving control circuit, a second energy storage circuit and a first control data voltage writing-in circuit; the first control data voltage writing-in circuit controls to write a first control data voltage into the third node under the control of a first writing-in control signal; both the first terminal of the first driving circuit and the first terminal of the second driving circuit are electrically connected to a power supply voltage terminal, the first driving circuit is used to drive the light emitting element under the control of a potential of the control terminal thereof, and the second driving circuit is used to drive the light emitting element under the control of a potential of the control terminal thereof.
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公开(公告)号:US20240282263A1
公开(公告)日:2024-08-22
申请号:US18650738
申请日:2024-04-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Weixing LIU , Kuanjun PENG , Bin QIN , Xue DONG , Fangzhen ZHANG , Wanpeng TENG , Tieshi WANG , Wanzhi CHEN , Kai GUO , Chunfang ZHANG
IPC: G09G3/3233 , H01L27/15 , H01L33/06 , H01L33/38
CPC classification number: G09G3/3233 , H01L27/156 , H01L33/06 , H01L33/38 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2310/0262 , G09G2310/08 , G09G2320/0233
Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit, a switching circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is configured to transmit a first voltage signal received at the first voltage signal terminal to a second node. The switching circuit includes switching transistors. The light-emitting diode chip is electrically connected to the second node. The light-emitting diode chip includes light-emitting portions. The light-emitting diode chip is configured to drive the light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time. At least part of the light-emitting portions are sequentially connected in series through at least one switching transistor.
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公开(公告)号:US20230013848A1
公开(公告)日:2023-01-19
申请号:US17783207
申请日:2021-05-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lubin SHI , Wanpeng TENG , Liang CHEN , Bin QIN , Ke WANG , Jintao PENG , Fangzhen ZHANG , Kuanjun PENG
IPC: H01L27/32
Abstract: A display panel has a display region and a fan-out lead region, the fan-out lead region is located within the display region. The display panel comprises a base, a pixel circuit layer, a plurality of fan-out leads disposed between the base and the pixel circuit layer and located in the fan-out lead region, and an electrical field shielding pattern disposed between the pixel circuit layer and a film layer in which the plurality of fan-out leads are located. The pixel circuit layer includes a plurality of pixel circuits, at least one pixel circuit is located in the fan-out lead region. At least one fan-out lead is electrically connected to the pixel circuits. Orthographic projection of active layer patterns of transistors of the pixel circuit located in the fan-out lead region on the base are located within an orthographic projection of the electric field shielding pattern on the base.
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公开(公告)号:US20220115455A1
公开(公告)日:2022-04-14
申请号:US17330704
申请日:2021-05-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wei QIN , Zhiqiang XU , Weixing LIU , Wanpeng TENG , Chunfang ZHANG
IPC: H01L27/32
Abstract: The present disclosure relates to a display panel and a terminal device. The display panel includes a display region. At least a part of the display region is a transparent region. The transparent region has a plurality of pixel rows distributed along a column direction, and each of the plurality of pixel rows includes pixels and transparent portions arranged in a row direction. The pixel rows include first pixel rows and second pixel rows, transparent portions each arranged between two adjacent pixels in each of the first pixel rows are first transparent portions, and transparent portions each arranged between two adjacent pixels in each of the second pixel rows are second transparent portions. A width of each of the first transparent portions in the row direction is greater than a width of each of the second transparent portions in the row direction.
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公开(公告)号:US20210225288A1
公开(公告)日:2021-07-22
申请号:US16772796
申请日:2019-12-09
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wanpeng TENG , Xueling GAO
IPC: G09G3/3258
Abstract: A pixel-driving circuit includes: a write-compensation sub-circuit coupled to a signal scanning terminal, a data terminal and a driving sub-circuit, and configured to, controlled with voltage from the signal scanning terminal, provide voltages of the data terminal to the driving sub-circuit for compensation; the light-emission control sub-circuit is coupled with the light-emission terminal, the first power source terminal and the driving sub-circuit and configured to provide voltages of the first power source terminal to the first terminal of the driving transistor controlled with voltage from the light-emission control terminal; the reset sub-circuit is coupled with the reset signal terminal, the initial voltage terminal, and the driving sub-circuit and to provide voltages of the initial voltage terminal to the gate of the driving transistor controlled with voltage from the reset signal terminal, causing the driving transistor to be in ON and OFF states respectively during the first and second initialization phases.
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公开(公告)号:US20170155897A1
公开(公告)日:2017-06-01
申请号:US15122702
申请日:2015-10-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Tieshi WANG , Saihua CHEN , Xuefei WANG , Wanpeng TENG , Heliang DI , Zhihong DU , Shanshan ZHOU
CPC classification number: H04N17/045 , G09G3/006 , G09G2300/026 , G09G2310/0221 , G09G2310/0232 , G09G2320/0242 , G09G2330/10 , G09G2340/045 , H04N17/02 , H04N17/04
Abstract: A testing method and a testing apparatus for splicing screens (1, 2, 3, 4) are provided. The method includes: outputting an image signal to a display screen, wherein the display screen includes a plurality of splicing screens (1, 2, 3, 4), the image signal includes a plurality of testing sub pictures, the testing sub pictures are arranged correspondingly to the splicing screens (1, 2, 3, 4) so as to enable the splicing screens (1, 2, 3, 4) to display the corresponding testing sub pictures, and the testing sub pictures include testing contents (5, 6, 7, 8, 9, 10, 11, 12); and testing the splicing screens (1, 2, 3, 4) through the testing contents (5, 6, 7, 8, 9, 10, 11, 12). Testing on the splicing screens (1, 2, 3, 4) is achieved, and a testing result can be used for regulating the splicing screens (1, 2, 3, 4), so that defects generated in the displaying process of the splicing screens (1, 2, 3, 4) are reduced.
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公开(公告)号:US20240332468A1
公开(公告)日:2024-10-03
申请号:US18667288
申请日:2024-05-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Kai GUO , Weixing LIU , Wanpeng TENG , Meirong LU , Yuwei YAN , Chunfang ZHANG , Zhiqiang XU , Jintao PENG , Xinxing WANG
CPC classification number: H01L33/58 , H01L27/156 , H01L33/0093 , H01L33/502 , H01L33/507 , H01L33/52
Abstract: A display panel has sub-pixel regions. The display panel includes an optical device layer, an adhesive layer and a light adjustment layer. The optical device layer includes a buffer layer and light-emitting units, a light-emitting unit is located in an opening region of a corresponding sub-pixel region, and the buffer layer is located on a light-exit surface of the light-emitting units. The adhesive layer is located on a side of the buffer layer away from the light-emitting units, a refractive index n2 of the adhesive layer being less than a refractive index n1 of the buffer layer. The light adjustment layer is located on the side of the buffer layer, and is configured such that when light emitted by the light-emitting units enters into the buffer layer, at least part of light with a refraction angle greater than or equal to
arc
sin
n
2
n
1
enters the adhesive layer through the light adjustment layer.-
公开(公告)号:US20240282782A1
公开(公告)日:2024-08-22
申请号:US18640015
申请日:2024-04-19
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guoteng LI , Shuilang DONG , Xinhong LU , Jingshang ZHOU , Liuqing LI , Zhao CUI , Dapeng XUE , Zhiqiang XU , Jintao PENG , Weixing LIU , Kai GUO , Chunfang ZHANG , Meirong LU , Wanpeng TENG
CPC classification number: H01L27/1248 , H01L25/167
Abstract: A display panel and a display device are provided. The display panel includes a plurality of display units, each display unit includes a transparent area, and the display panel further includes a base substrate and a composite functional layer. The composite functional layer is provided on a side of the base substrate and has a first through-hole formed therein, and the first through-hole is provided in the transparent area. The composite functional layer includes a composite transparent layer and a light-shielding layer. The composite transparent layer includes a plurality of transparent functional layers, and includes a light-transmitting part surrounding the first through-hole. An orthographic projection of the light-shielding layer on the base substrate covers an orthographic projection of at least a portion of the light-transmitting part on the base substrate.
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公开(公告)号:US20240266358A1
公开(公告)日:2024-08-08
申请号:US18021902
申请日:2022-05-24
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhiqiang XU , Weixing LIU , Chunfang ZHANG , Wanpeng TENG , Jintao PENG , Kai GUO , Meirong LU
IPC: H01L27/12 , G02F1/133 , G02F1/13357 , G02F1/1343 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/13306 , G02F1/133621 , G02F1/134309 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2203/30
Abstract: The embodiment of the present disclosure provides a display panel, which includes an array substrate, a counter substrate and a spacer. The array substrate includes a base substrate and a plurality of signal lines on the base substrate. The plurality of signal lines include a plurality of first signal lines and a plurality of second signal lines. The plurality of first signal lines and the plurality of second signal lines intersect each other to define a plurality of first regions. The plurality of first regions include a plurality of first pixel regions, at least one second pixel region and at least one redundant region. The first signal line extends along a first direction, the second signal line includes a body portion extending along a second direction, at least one second signal line further includes a bending portion connected to the body portion.
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公开(公告)号:US20240186454A1
公开(公告)日:2024-06-06
申请号:US17789351
申请日:2021-05-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Weixing LIU , Kuanjun PENG , Xiaolong LI , Wanpeng TENG , Bin QIN , Wanzhi CHEN , Fangzhen ZHANG , Chunfang ZHANG , Zhiqiang XU
IPC: H01L33/38 , G09G3/32 , H01L25/075 , H01L33/62
CPC classification number: H01L33/382 , G09G3/32 , H01L25/0753 , H01L33/62 , G09G2300/0819 , G09G2300/0852 , G09G2320/0626 , G09G2330/021
Abstract: A light-emitting device includes a first semiconductor layer, a light-emitting functional layer and a second semiconductor layer that are stacked. The first semiconductor layer includes a first semiconductor pattern and a second semiconductor pattern. The light-emitting functional layer includes a first light-emitting pattern and a second light-emitting pattern spaced apart. The second semiconductor layer includes a third semiconductor pattern and a fourth semiconductor pattern spaced apart. Orthographic projections of the first semiconductor pattern, the first light-emitting pattern and the third semiconductor pattern on a reference plane at least partially overlap to form a first light-emitting portion. Orthographic projections of the second semiconductor pattern, the second light-emitting pattern and the fourth semiconductor pattern on the reference plane at least partially overlap to form a second light-emitting portion. The reference plane is parallel to a plane where the first semiconductor layer is located.
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