公开(公告)号：US20170110055A1

公开(公告)日：2017-04-20

申请号：US15122390

申请日：2015-07-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yongqian LI ,  Longyan WANG ,  Quanhu LI ,  Jingwen YIN ,  Baoxia ZHANG ,  Cuili GAI ,  Kun CAO ,  Zhongyuan WU

IPC: G09G3/3258 ,  H01L51/50 ,  G09G3/325 ,  H01L27/32 ,  G09G3/3266 ,  G09G3/3291

CPC classification number: G09G3/3258 ,  G09G3/325 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/043 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2310/0216 ,  G09G2320/0204 ,  G09G2320/045 ,  H01L27/3265 ,  H01L27/3276 ,  H01L51/5012

Abstract: The present disclosure relates to a pixel circuit, a driving method thereof and related devices. The pixel circuit comprises: a reset compensation module, a data writing module, a storage module and a driving transistor. With the cooperation of each module, the pixel circuit can compensate shift of a threshold voltage for a driving transistor by storing the threshold voltage for the driving transistor in the storage module. Therefore, when the source of the driving transistor in the pixel circuit is connected with a light emitting device for driving it to emit light for display, the driving current of the driving transistor for driving the light emitting device to emit light will be only associated with the voltage of the data signal, but not the threshold voltage for the driving transistor. In this way, influence of the threshold voltage of the driving transistor on the light emitting device will be avoided.

公开(公告)号：US20170053577A1

公开(公告)日：2017-02-23

申请号：US15168775

申请日：2016-05-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Kun CAO ,  Zhongyuan WU

IPC: G09G3/00 ,  G09G3/3266 ,  G06T7/00 ,  G09G3/3258

CPC classification number: G09G3/006 ,  G09G3/3258 ,  G09G3/3266 ,  G09G2330/10

Abstract: A judging method of array test reliability, comprising steps: S1, taking at least one of organic light emitting backplanes subjected to an array test as a sample substrate; S2, performing a scan on pixel units of the sample substrate row by row and providing a data voltage signal; S3, detecting a current that is output to an anode of each pixel unit from a pixel circuit layer; S4, comparing the current that is output to the anode of each pixel unit from the pixel circuit layer with a predefined current, judging that the pixel unit is a defective pixel unit when the two are inconsistent; S5, comparing a judgment result of each pixel unit with a test result of the array test, judging that the array test is reliable when the two are consistent, judging that the array test is unreliable when the two are inconsistent.

Abstract translation: 阵列测试可靠性的判断方法，包括步骤：S1，将经过阵列测试的有机发光背板中的至少一个作为样品衬底; S2，逐行扫描样品衬底的像素单元并提供数据电压信号; S3，从像素电路层检测输出到每个像素单元的阳极的电流; S4，将像素电路层的输出到阳极的电流与预定电流进行比较，判断为两者不一致时的像素单位为缺陷像素单位; S5，将每个像素单元的判断结果与阵列测试的测试结果进行比较，当两者一致时判断阵列测试可靠，判断当两者不一致时阵列测试不可靠。

公开(公告)号：US20160019977A1

公开(公告)日：2016-01-21

申请号：US14870635

申请日：2015-09-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Kun CAO ,  Ming HU

IPC: G11C19/28

CPC classification number: G11C19/28 ,  H01L27/1251 ,  H01L29/458 ,  H01L29/4908

Abstract: An embodiment of the disclosed technology provides a driving device for a thin film transistor liquid crystal display (TFT-LCD) and a method for manufacturing the same. The driving device comprises at least one first TFT and at least one second TFT formed a base substrate, wherein load of the first TFT is larger than load of the second TFT, the first TFT is of a top-gate configuration, and the second TFT is of a bottom-gate configuration.

Abstract translation: 所公开技术的一个实施例提供了一种用于薄膜晶体管液晶显示器（TFT-LCD）的驱动装置及其制造方法。 所述驱动装置包括至少一个第一TFT和至少一个第二TFT，所述至少一个第二TFT形成为基底，其中所述第一TFT的负载大于所述第二TFT的负载，所述第一TFT为顶栅结构，并且所述第二TFT 是底栅配置。

公开(公告)号：US20150325190A1

公开(公告)日：2015-11-12

申请号：US14416884

申请日：2014-04-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Kun CAO

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G11C19/28

Abstract: There are provided a shift register unit, a gate driving circuit and a display device, which enable gate lines in non-output rows to remain in the state of no signal outputting. The shift register unit comprises an input module (10), a pull-up module (20), a pull-down control module (30), a first pull-down module (31), a second pull-down module (40) and a reset module (50). In the non-output time, the first pull-down module and the second pull-down module pull down the output voltages of the pull-up modules connected thereto to a low level alternately, thereby enabling gate lines in non-output rows to remain in the state of no signal outputting.

Abstract translation: 提供了移位寄存器单元，栅极驱动电路和显示装置，其使非输出行中的栅极线保持在无信号输出的状态。 移位寄存器单元包括输入模块（10），上拉模块（20），下拉控制模块（30），第一下拉模块（31），第二下拉模块（40） 和复位模块（50）。 在非输出时间，第一下拉模块和第二下拉模块交替地将连接到其上拉模块的输出电压下拉到低电平，从而使非输出行中的栅极线保持 处于无信号输出状态。

公开(公告)号：US20180226465A1

公开(公告)日：2018-08-09

申请号：US15570712

申请日：2017-04-24

Applicant: Boe Technology Group Co., Ltd.

Inventor： Kun CAO

IPC: H01L27/32 ,  H01L51/52

CPC classification number: H01L27/3276 ,  H01L27/3279 ,  H01L27/329 ,  H01L51/5203

Abstract: The embodiments of the invention provide a wiring structure, an array substrate and manufacturing method thereof, and a display panel, relate to the field of display technology, and can reduce the resistance of the wiring structure while reducing the wire width of the wiring structure. The wiring structure includes a first metal wire and a second metal wire disposed in a stack; wherein the first metal wire and the second metal wire are in direct contact.

公开(公告)号：US20170103722A1

公开(公告)日：2017-04-13

申请号：US15122372

申请日：2015-08-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chen SONG ,  Zhongyuan WU ,  Kun CAO ,  Hongjun XIE

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/287

Abstract: The present disclosure provides a shift register unit, a gate driving circuit and a display apparatus. The shift register unit comprises: a first latch module having a first input terminal connected to a first clock signal terminal or a second clock signal terminal, a second input terminal for receiving a pulse signal, and an output terminal; and a second latch module having a first input terminal connected to the first clock signal terminal or the second clock signal terminal, a second input terminal connected to the output terminal of the first latch module, and an output terminal connected to a signal output terminal of the shift register unit. The first input terminal of the first latch module and the first input terminal of the second latch module are connected to the same signal terminal.

公开(公告)号：US20170033192A1

公开(公告)日：2017-02-02

申请号：US14913581

申请日：2015-07-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Longyan WANG ,  Yongqian LI ,  Kun CAO ,  Quanhu LI ,  Jingwen YIN ,  Baoxia ZHANG ,  Cuili GAI ,  Zhongyuan WU ,  Gang WANG

IPC: H01L29/45 ,  H01L29/22 ,  H01L29/20 ,  H01L29/786 ,  H01L21/4763 ,  H01L29/423 ,  H01L21/285 ,  H01L21/443 ,  H01L21/3213 ,  H01L29/24 ,  H01L29/66

CPC classification number: H01L29/45 ,  H01L21/28575 ,  H01L21/32134 ,  H01L21/443 ,  H01L21/47635 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/22 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66522 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78681 ,  H01L29/7869

Abstract: A thin film transistor, a manufacturing method thereof, and a display device are provided. The thin film transistor includes a gate electrode (21), an active layer (23), a source electrode (241) and a drain electrode (242). The source electrode (241) and the drain electrode (242) are formed of at least two materials, the forming materials of the source electrode (241) and the drain electrode (242) can create a cell reaction in a corresponding etching solution so as to be etched, and material of the active layer (23) is not corroded by the etching solution. With the thin film transistor and manufacturing method thereof according to embodiments of the invention, a problem that an active layer is liable to be corroded in an etching procedure of a source electrode and a drain electrode can be solved, and thus the thin film transistor device can be manufactured by using a back channel etch process. Consequently, the process number for manufacture of the thin film transistor is decreased, and the manufacturing cost is saved.

Abstract translation: 提供薄膜晶体管，其制造方法和显示装置。 薄膜晶体管包括栅电极（21），有源层（23），源电极（241）和漏电极（242）。 源极（241）和漏电极（242）由至少两种材料形成，源电极（241）和漏电极（242）的形成材料可以在相应的蚀刻溶液中产生电池反应，从而 被蚀刻，并且有源层（23）的材料不被蚀刻溶液腐蚀。 利用根据本发明的实施例的薄膜晶体管及其制造方法，可以解决在源电极和漏电极的蚀刻过程中有源层易于腐蚀的问题，因此薄膜晶体管器件 可以通过使用背沟道蚀刻工艺来制造。 因此，薄膜晶体管的制造工序减少，节省了制造成本。

公开(公告)号：US20160180770A1

公开(公告)日：2016-06-23

申请号：US14646179

申请日：2014-09-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Liye DUAN ,  Zhongyuan WU ,  Lirong WANG ,  Kun CAO

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G3/3291 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2300/0866 ,  G09G2310/0289 ,  G09G2320/0233 ,  G09G2320/0626 ,  G09G2330/021

Abstract: There are provided a pixel circuit and a driving method thereof, and a display apparatus. The pixel circuit comprises: a first transistor (T1), a second transistor (T2), a third transistor (T3), a storage capacitor (C1) and a light emitting device (L). A gate of the first transistor (T1) is connected to a first control signal terminal (S1), and a first electrode thereof is connected to a data signal terminal (DATA); a gate of the second transistor (T2) is connected to a second electrode of the first transistor (T1), a first electrode thereof is connected to a second electrode of the third transistor (T3), and a second electrode thereof is connected to a first terminal of the light emitting device (L); a gate of the third transistor (3) is connected to a second control signal terminal (S2), and a first electrode thereof is connected to a first power supply signal terminal (ELVDD); one terminal of the storage capacitor (C1) is connected to the gate of the second transistor (T2), and the other terminal thereof is connected to the second electrode of the second transistor (T2); one terminal of a parasitic capacitor (C2) formed by the light emitting device is connected to the first terminal of the light emitting device (L), and the other terminal thereof is connected to a second terminal of the light emitting device (L); and the second terminal of the light emitting device (L) is further connected to a second power supply signal terminal (ELVSS). The pixel circuit can compensate for the threshold voltage drift of TFT effectively and rise display effect.

Abstract translation: 提供了像素电路及其驱动方法和显示装置。 像素电路包括：第一晶体管（T1），第二晶体管（T2），第三晶体管（T3），存储电容器（C1）和发光器件（L）。 第一晶体管（T1）的栅极连接到第一控制信号端子（S1），其第一电极连接到数据信号端子（DATA）; 第二晶体管（T2）的栅极连接到第一晶体管（T1）的第二电极，其第一电极连接到第三晶体管（T3）的第二电极，并且其第二电极连接到 发光装置（L）的第一端子; 第三晶体管（3）的栅极连接到第二控制信号端子（S2），其第一电极连接到第一电源信号端子（ELVDD）; 存储电容器（C1）的一个端子连接到第二晶体管（T2）的栅极，另一个端子连接到第二晶体管（T2）的第二电极; 由发光器件形成的寄生电容器（C2）的一个端子连接到发光器件（L）的第一端子，并且其另一个端子连接到发光器件（L）的第二端子; 并且发光器件（L）的第二端子进一步连接到第二电源信号端子（ELVSS）。 像素电路可以有效地补偿TFT的阈值电压漂移并提高显示效果。