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公开(公告)号:US20190243196A1
公开(公告)日:2019-08-08
申请号:US16320580
申请日:2018-05-15
Inventor: Xiaoyuan WANG , Ni YANG , Wu WANG , Kui ZHANG , Yan FANG
IPC: G02F1/1362 , H01L27/12 , G02F1/1343
CPC classification number: G02F1/136259 , G02F1/1309 , G02F1/13439 , G02F1/136209 , G02F1/136286 , G02F2001/136263 , H01L27/124 , H01L27/1259
Abstract: An array substrate and a maintenance method therefor, and a display apparatus are provided. The array substrate includes: a plurality of data signal lines, wherein each of the data signal lines includes a plurality of data signal line sub-segments corresponding to a plurality of pixel units on a one-to-one basis, and each of the pixel units includes a light-shielding metal strip, wherein an orthographic projection of an input end of the data signal line sub-segment on a base substrate and an orthographic projection of the light-shielding metal strip on the base substrate have a first overlapping region used as a first maintenance site, and an orthographic projection of an output end of the data signal line sub-segment on the base substrate and an orthographic projection of the light-shielding metal strip on the base substrate have a second overlapping region used as a second maintenance site.
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公开(公告)号:US20190101783A1
公开(公告)日:2019-04-04
申请号:US15995659
申请日:2018-06-01
Inventor: Ruilin BI , Qiang XIONG , Kui ZHANG , Xiongzhou WEI , Chao LIU
IPC: G02F1/1333 , G02F1/1339
Abstract: A curved display panel includes a first substrate and a second substrate cell-assembled to each other, a spacer layer disposed between the first substrate and the second substrate and configured to support the first substrate and the second substrate so as to form a gap, and a liquid crystal layer disposed in the gap, wherein the spacer layer includes a plurality of spacer groups, each of the plurality of spacer groups includes a first spacer provided on the first substrate and a second spacer provided on the second substrate, the plurality of spacer groups have supporting area on the first substrate as same as supporting area on the second substrate. A curved display device is further provided.
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公开(公告)号:US20190094598A1
公开(公告)日:2019-03-28
申请号:US15767883
申请日:2017-09-29
Inventor: Xiaoyuan WANG , Yan FANG , Kui ZHANG , Zhicai XU , Ming DENG
IPC: G02F1/1345 , H01L27/12 , G02F1/1333
CPC classification number: G02F1/13458 , G02F1/133345 , G02F1/13452 , G02F1/1368 , G02F2001/133357 , G02F2001/136222 , G02F2001/136236 , H01L27/124 , H01L27/1248 , H01L27/1288
Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method of the display substrate includes: forming an insulation layer on a base substrate, the base substrate including a display area and a peripheral area and forming a planarization film on the insulation layer; performing a patterning process to the planarization film to form a planarization layer with a first thickness in the display area, a planarization layer with a second thickness in the peripheral area, and a first via hole in the planarization layer with the second thickness, the second thickness being less than the first thickness, and performing an etching process on the peripheral area to thin or remove the planarization layer is with the second thickness, and forming a second via hole corresponding to the first via hole in the insulation layer.
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公开(公告)号:US20180284507A1
公开(公告)日:2018-10-04
申请号:US15822694
申请日:2017-11-27
Inventor: Zhicai XU , Kui ZHANG , Hui LI , Mengqiu LIU
IPC: G02F1/1362 , H01L27/12 , G02B5/20
Abstract: The present disclosure relates to a COA substrate and a manufacturing method thereof, a display device. The COA substrate includes the following layers in a wiring region: a first conduction layer including a signal wire lead; an insulation layer having a first via to expose the signal wire lead; a second conduction layer including a first metal pattern with a second via; a flat layer having a hollowed-out region; and a connection pattern. The second via is at least in part located within the hollowed-out region, and orthographic projections of a border of a portion of the second via which is located within the hollowed-out region and a border of the first via on the base substrate overlap. The connection pattern extends through the first via and the second via and connects to the signal wire lead.
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