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公开(公告)号:US20250078746A1
公开(公告)日:2025-03-06
申请号:US18287305
申请日:2023-01-06
Inventor: Yao ZHANG , Wenchao BAO , Song MENG , Xiaolong WEI , Miao LIU , Cheng XU
IPC: G09G3/3233
Abstract: Provided is a method for sensing pixel internal data in a display device. The method includes: sensing pixel internal data for each line of pixel units to determine column sequence numbers of suspected abnormal pixel units in the line of pixel units; determining, based on a number of the suspected abnormal pixel units of each column sequence number in the at least three lines of pixel units, whether a sensing signal line corresponding to the column sequence number is an abnormal sensing signal line; and in a case that there is at least one abnormal sensing signal line, replacing pixel internal data of a column of pixel units corresponding to each abnormal sensing signal line with pixel internal data of at least one column of pixel units adjacent to the abnormal sensing signal line each time the pixel internal data of all pixel units is sensed.
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公开(公告)号:US20240395201A1
公开(公告)日:2024-11-28
申请号:US18272811
申请日:2022-07-29
Inventor: Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Xiuting LIU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3233 , G11C19/28 , H10K59/131
Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.
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公开(公告)号:US20240386845A1
公开(公告)日:2024-11-21
申请号:US18033589
申请日:2022-06-29
Inventor: Zhidong YUAN , Cheng XU , Dacheng ZHANG , Can YUAN , Xiuting LIU , Yongqian LI
IPC: G09G3/3233
Abstract: The present disclosure provides a signal selection circuit and a signal selection method of a display panel, and a display device. The display panel has N regions and includes pixel driving circuits and M gate driving circuits for providing M gate driving signals to the pixel driving circuits; each gate driving circuit includes N gate driving sub-circuits, each of which is configured to provide one gate driving signal to the pixel driving circuits in one region; M≥2, N≥2, and M and N are integers; the signal selection circuit includes: M frame start signal lines, each of which is configured to provide a frame start signal for one gate driving circuit; and a selection sub-circuit configured to output frame start signals written by the frame start signal lines to the gate driving sub-circuits corresponding to the regions of the display panel according to a preset sequence.
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公开(公告)号:US20240321195A1
公开(公告)日:2024-09-26
申请号:US18257385
申请日:2022-06-24
IPC: G09G3/3225 , G02F1/1345 , G09G3/32 , G09G3/36 , H10K59/126 , H10K59/131
CPC classification number: G09G3/3225 , G02F1/13452 , G09G3/32 , G09G3/3648 , H10K59/126 , H10K59/131 , G09G2300/0426 , G09G2310/0291 , G09G2320/0219 , G09G2370/14
Abstract: A display module includes a display panel, at least one bonding circuit board, a plurality of chip-on-films, and a plurality of buffer devices. The at least one bonding circuit board each include first differential lines, and a first differential line includes a P-polarity differential sub-line and an N-polarity differential sub-line. An end of a chip-on-film is connected to the first differential line, and the other end of the chip-on-film is connected to the display panel. The buffer devices are arranged on the bonding circuit board, a buffer device is connected to ends, proximate to the chip-on-film, of the P-polarity differential sub-line and the N-polarity differential sub-line, and the buffer device is configured to reduce signal reflection between the first differential line and the chip-on-film.
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公开(公告)号:US20250104626A1
公开(公告)日:2025-03-27
申请号:US18558500
申请日:2022-10-28
Inventor: Can YUAN , Yongqian LI , Zhidong YUAN , Cheng XU , Dacheng ZHANG , Dandan ZHOU , Liu WU , Luke DING , Xiuting LIU
IPC: G09G3/3233 , G09G3/32
Abstract: A display substrate and a display device. The display substrate includes a driving circuit layer, a first scanning line and a second scanning line. The driving circuit layer includes pixel units arranged in an array form, each pixel unit includes a plurality of sub-pixels, at least one sub-pixel includes a pixel driving circuit, the pixel driving circuit includes a first transistor and a second transistor, an active pattern of the first transistor includes a first channel region, an active pattern of the second transistor includes a second channel region, the first channel region is located on a side of the first scanning line away from the second scanning line, and the second channel region is located on a side of the second scanning line away from the first scanning line.
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公开(公告)号:US20250095547A1
公开(公告)日:2025-03-20
申请号:US18576548
申请日:2022-12-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ying HAN , Pan XU , Xing ZHANG , Chengyuan LUO , Guangshuang LV , Donghui ZHAO , Cheng XU
IPC: G09G3/32 , G09G3/3233
Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels, the sub-pixel includes a pixel circuit and a light-emitting element, the pixel circuit is configured to drive the light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting functional layer located therebetween; the pixel circuit includes a driving transistor, and the first electrode of the light-emitting element is electrically connected to a first electrode of the driving transistor; the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, the first sub-pixel is adjacent to the second sub-pixel, and an orthographic projection of the first electrode of the light-emitting element of the first sub-pixel on the base substrate does not overlap an orthographic projection of the pixel circuit of the second sub-pixel on the base substrate.
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公开(公告)号:US20250081740A1
公开(公告)日:2025-03-06
申请号:US18555905
申请日:2023-02-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wei QUAN , Juanjuan YOU , Bin BO , Cheng XU
IPC: H10K59/122 , H10K59/12 , H10K59/173
Abstract: A display substrate is provided and includes a base substrate; a plurality of sub-pixels, a pixel-defining pattern, and a first filling structure. The sub-pixels are on the base substrate, each of at least part of the plurality of sub-pixels includes a light-emitting element, the pixel-defining pattern includes a plurality of openings and a defining portion that surrounds the plurality of openings, the defining portion includes at least one cavity surrounding at least one opening, and the first filling structure is in the cavity, and a surface, away from the base substrate, of the first filling structure is farther away from the base substrate than a surface, away from the base substrate, of at least a portion of the light-emitting functional layer in the opening.
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公开(公告)号:US20240395852A1
公开(公告)日:2024-11-28
申请号:US18262456
申请日:2022-09-29
Inventor: Leilei CHENG , Cheng XU , Jie LIU , Bin ZHOU , Liangchen YAN , Haitao WANG , Ao SHENG
Abstract: Embodiments of the present disclosure provide an array substrate and a related display panel and a method of manufacturing thereof. An array substrate comprises: a substrate; a first light-shielding layer; a first dielectric layer which comprises a first opening; a transistor, which comprises an active layer with a first source/drain region, a second source/drain region, and a channel region; a second dielectric layer, which comprises a second opening, wherein a second projection of the second opening on the substrate at least partially overlaps with a first projection of the first opening on the substrate; a first conductive layer; a third dielectric layer, which comprises a third opening, wherein a third projection of the third dielectric layer on the substrate at least partially overlaps with the first projection and the second projection; a fourth dielectric layer, which comprises a fourth opening, wherein a fourth projection of the fourth dielectric layer on the substrate at least partially overlaps with the first projection of the first opening, the second projection of the second opening, and the third projection of the third opening; and a second conductive layer.
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公开(公告)号:US20240363050A1
公开(公告)日:2024-10-31
申请号:US18029107
申请日:2022-06-29
IPC: G09G3/20 , G09G3/3233
CPC classification number: G09G3/2092 , G09G3/3233 , G09G2300/0842 , G09G2320/0257 , G09G2320/045
Abstract: Provided are a timing controller, sensing compensation method thereof, and display panel. The timing controller includes a sensing module (501), a built-in picture generation module (502), a multi-channel data selection module (503) and a processing output module (504). The sensing module is configured to sense whether a sensing compensation instruction is received, when received, notify built-in picture generation module and multi-channel data selection module; built-in picture generation module is configured to receive a notification and generate a first video signal; multi-channel data selection module is configured to receive a notification, switch from a display mode to a built-in picture mode, select first video signal as a video source, output first video signal to processing output module; processing output module is configured to process first video signal and output processed first video signal to the display panel so that the display panel performs sensing compensation based on the first video signal.
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公开(公告)号:US20240321198A1
公开(公告)日:2024-09-26
申请号:US18034374
申请日:2022-06-29
Inventor: Min HE , Xiaolong WEI , Song MENG , Qiang FEI , Jingbo XU , Cheng XU , Miao LIU , Pengfei YIN
IPC: G09G3/3233 , G09G3/20
CPC classification number: G09G3/3233 , G09G3/2096 , G09G2300/0819 , G09G2300/0842 , G09G2320/103
Abstract: Disclosed are a display panel and a display method thereof, and a display apparatus. The display panel includes multiple pixel units, a pixel unit includes multiple sub-pixels, a sub-pixel includes a pixel drive circuit, a sense compensation circuit, and an element to be driven, and the display panel further includes a detection unit and a compensator; the pixel drive circuit is configured to drive the element to be driven in active time; the sense compensation circuit is configured to sense electrical characteristics of the element to be driven in blank time; the detection unit is configured to detect whether a currently displayed picture is a still picture, send a first notification to the compensator when the currently displayed picture is a still picture, and send a second notification to the compensator when the currently displayed picture is a non-still picture.
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