公开(公告)号：US20100325484A1

公开(公告)日：2010-12-23

申请号：US12869260

申请日：2010-08-26

Applicant: Hiroshi SUZUKI ,  Tsutomu KOGA ,  Tetsuya INOUE ,  Tomokazu YOKOYAMA ,  Kenji JIN

Inventor： Hiroshi SUZUKI ,  Tsutomu KOGA ,  Tetsuya INOUE ,  Tomokazu YOKOYAMA ,  Kenji JIN

IPC: G06F11/16 ,  G06F11/00

CPC classification number: G11B27/36 ,  G06F11/1443 ,  G06F11/201 ,  G06F11/2015 ,  G06F11/2089 ,  G11B27/002 ,  G11B2220/2516

Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.

Abstract translation: 一个或多个开关插在控制器部分和存储装置之间。 当向某个存储设备发送命令失败时，从控制器部分与某个存储设备连接的交换机之间的路径的上游侧到下游侧发送命令，并且当命令传输失败时 从第k个开关发送命令（k为0以上的整数），连接到第（k + 1）个开关，并且是第（k + 1）个开关的上游的一个电平或从控制器的任何端口 确定在向第（k + 1）开关供电的电源中发生故障。

公开(公告)号：US07809983B2

公开(公告)日：2010-10-05

申请号：US12068205

申请日：2008-02-04

Applicant: Hiroshi Suzuki ,  Tsutomu Koga ,  Tetsuya Inoue ,  Tomokazu Yokoyama ,  Kenji Jin

Inventor： Hiroshi Suzuki ,  Tsutomu Koga ,  Tetsuya Inoue ,  Tomokazu Yokoyama ,  Kenji Jin

IPC: G06F11/00

CPC classification number: G11B27/36 ,  G06F11/1443 ,  G06F11/201 ,  G06F11/2015 ,  G06F11/2089 ,  G11B27/002 ,  G11B2220/2516

Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.

Abstract translation: 一个或多个开关插在控制器部分和存储装置之间。 当向某个存储设备发送命令失败时，从控制器部分与某个存储设备连接的交换机之间的路径的上游侧到下游侧发送命令，并且当命令传输失败时 从第k个开关发送命令（k为0以上的整数），连接到第（k + 1）个开关，并且是第（k + 1）个开关的上游的一个电平或从控制器的任何端口 确定在向第（k + 1）开关供电的电源中发生故障。

公开(公告)号：US07522426B2

公开(公告)日：2009-04-21

申请号：US11291413

申请日：2005-11-30

Applicant: Tsutomu Koga ,  Mitsuru Inoue

Inventor： Tsutomu Koga ,  Mitsuru Inoue

IPC: H01R12/16

CPC classification number: H05K7/1457

Abstract: A backplane has signal connectors for connecting signals of logical boards connected to an upper level of the backplane; signal connectors for connecting signals of logical boards connected to a lower level of the backplane; power source connectors for supplying power to the logical boards connected to the upper level of the backplane; and power source connectors for supplying power to the logical boards connected to the lower level of the backplane. Some power source connectors are formed at one end of the backplane and the other power source connectors are formed at the other end of the backplane.

Abstract translation: 背板具有用于连接到背板的上层的逻辑板的信号的信号连接器; 信号连接器，用于连接到背板的较低级的逻辑板的信号; 电源连接器，用于为连接到背板的上层的逻辑板供电; 以及用于向连接到背板的较低级的逻辑板供电的电源连接器。 一些电源连接器形成在背板的一端，另一个电源连接器形成在背板的另一端。

公开(公告)号：US20070083690A1

公开(公告)日：2007-04-12

申请号：US11291413

申请日：2005-11-30

Applicant: Tsutomu Koga ,  Mitsuru Inoue

Inventor： Tsutomu Koga ,  Mitsuru Inoue

IPC: H05K7/10

CPC classification number: H05K7/1457

Abstract: A backplane has signal connectors for connecting signals of logical boards connected to an upper level of the backplane; signal connectors for connecting signals of logical boards connected to a lower level of the backplane; power source connectors for supplying power to the logical boards connected to the upper level of the backplane; and power source connectors for supplying power to the logical boards connected to the lower level of the backplane. Some power source connectors are formed at one end of the backplane and the other power source connectors are formed at the other end of the backplane.

Abstract translation: 背板具有用于连接到背板的上层的逻辑板的信号的信号连接器; 信号连接器，用于连接到背板的较低级的逻辑板的信号; 电源连接器，用于为连接到背板的上层的逻辑板供电; 以及用于向连接到背板的较低级的逻辑板供电的电源连接器。 一些电源连接器形成在背板的一端，另一个电源连接器形成在背板的另一端。

公开(公告)号：US08677181B2

公开(公告)日：2014-03-18

申请号：US13059203

申请日：2010-12-13

Applicant: Yosuke Nakayama ,  Tetsuya Inoue ,  Tsutomu Koga ,  Hiroshi Suzuki

Inventor： Yosuke Nakayama ,  Tetsuya Inoue ,  Tsutomu Koga ,  Hiroshi Suzuki

IPC: G06F11/00

CPC classification number: G11B19/047 ,  G06F1/28 ,  G06F1/30

Abstract: A storage apparatus includes a drive unit device including multiple storage drives, a drive interface unit and a power supply unit, a storage controller including multiple processing units and a drive control interface unit, a recording part recording whether a relevant data input/output process was successful for each of multiple data paths, and a failure detection unit performing a process which, when one processing unit determines the data input/output process not being performed successfully, determines whether a result of the data input/output process performed by other processing units is recorded in the recording part within a predetermined period of time after an abnormality of the relevant data input/output process is recorded, and, when the first processing unit detecting the abnormality determines that the data input/output process abnormality is recorded, provides an instruction to stop the data input/output processes to the drive unit device in which the abnormality is detected.

Abstract translation: 一种存储装置，包括具有多个存储驱动器的驱动单元装置，驱动器接口单元和电源单元，包括多个处理单元的存储控制器和驱动控制接口单元，记录相关数据输入/输出处理是否为 成功地执行多个数据路径中的每一个，以及故障检测单元，执行当一个处理单元确定未成功执行的数据输入/输出处理时，确定其他处理单元执行的数据输入/输出处理的结果 在相关数据输入/输出处理的异常被记录之后的预定时间段内被记录在记录部分中，并且当检测到异常的第一处理单元确定数据输入/输出处理异常被记录时， 指令，停止数据输入/输出处理到发生异常的驱动单元设备 被迫

公开(公告)号：US20090063901A1

公开(公告)日：2009-03-05

申请号：US12068205

申请日：2008-02-04

Applicant: Hiroshi Suzuki ,  Tsutomu Koga ,  Tetsuya Inoue ,  Tomokazu Yokoyama ,  Kenji Jin

Inventor： Hiroshi Suzuki ,  Tsutomu Koga ,  Tetsuya Inoue ,  Tomokazu Yokoyama ,  Kenji Jin

IPC: G06F11/00

CPC classification number: G11B27/36 ,  G06F11/1443 ,  G06F11/201 ,  G06F11/2015 ,  G06F11/2089 ,  G11B27/002 ,  G11B2220/2516

Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.

Abstract translation: 一个或多个开关插在控制器部分和存储装置之间。 当向某个存储设备发送命令失败时，从控制器部分与某个存储设备连接的交换机之间的路径的上游侧到下游侧发送命令，并且当命令传输失败时 从第k个开关发送命令（k为0以上的整数），连接到第（k + 1）个开关，并且是第（k + 1）个开关的上游的一个电平或从控制器的任何端口 确定在向第（k + 1）开关供电的电源中发生故障。

公开(公告)号：US20060098320A1

公开(公告)日：2006-05-11

申请号：US11022781

申请日：2004-12-28

Applicant: Tsutomu Koga ,  Mitsuru Inoue

Inventor： Tsutomu Koga ,  Mitsuru Inoue

IPC: G11B5/09

CPC classification number: G06F11/1004 ,  G06F12/0866

Abstract: There are provided a cache region that stores write data from a host device, storage media, a data storage region for the storage media, and a comparison unit. A first comparison object is generated for N items of write data on the cache region and the N items of write data are transferred to the data storage region. Write data is read from a designated address of the data storage region and this write data is written to the storage media. When N items of write data have been read, a second comparison object is generated in respect of the write data. The comparison unit compares the first comparison object and the second comparison object, and if the result of the comparison is a mismatch, the N items of write data on the cache region are again transferred to the data storage region.

公开(公告)号：US07996605B2

公开(公告)日：2011-08-09

申请号：US12010847

申请日：2008-01-30

Applicant: Tsutomu Koga

Inventor： Tsutomu Koga

IPC: G06F12/00

CPC classification number: G06F1/3203 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0685 ,  G06F3/0688 ,  Y02D10/154

Abstract: A storage controller and a method for controlling a storage controller, including a plurality of nonvolatile memory modules having a plurality of nonvolatile memory chips for storing data from a host computer and a nonvolatile memory control unit for controlling data input to and output from the host computer by controlling a power source for the nonvolatile memory modules. The nonvolatile memory control unit, when reading or writing data from or to a designated nonvolatile memory module at a specified time in response to a data read/write request from the host computer, controls the power source for only the designated nonvolatile memory module to be turned on that can maintain its performance and reduce power consumption and thereby realize large capacity and low power consumption.

Abstract translation: 一种用于控制存储控制器的存储控制器和方法，包括具有用于存储来自主计算机的数据的多个非易失性存储器芯片的多个非易失性存储器模块和用于控制输入到主机和从主机输出的数据的非易失性存储器控制单元 通过控制非易失性存储器模块的电源。 非易失性存储器控制单元响应于来自主计算机的数据读/写请求在指定的时间从指定的非易失存储器模块读取数据或向其指定的非易失性存储器模块写数据时，仅将指定的非易失性存储器模块的电源控制为 打开可以保持其性能并降低功耗，从而实现大容量和低功耗。

公开(公告)号：US20090204743A1

公开(公告)日：2009-08-13

申请号：US12100569

申请日：2008-04-10

Applicant: Tetsuya INOUE ,  Hiroshi SUZUKI ,  Tsutomu KOGA

Inventor： Tetsuya INOUE ,  Hiroshi SUZUKI ,  Tsutomu KOGA

IPC: G06F12/00

CPC classification number: G06F11/201 ,  G06F11/2089

Abstract: Provided is a storage subsystem capable of inhibiting the deterioration in system performance to a minimum while improving reliability and availability. This storage subsystem includes a first controller for controlling multiple drive units connected via multiple first switch devices, and a second controller for controlling the multiple drive units connected via multiple second switch devices associated with the multiple first switch devices. This storage subsystem also includes a connection path that mutually connects the multiple first switch devices and the corresponding multiple second switch devices. When the storage [sub]system detects the occurrence of a failure, it identifies the fault site in the connection path, and changes the connection configuration of the switch device so as to circumvent the fault site.

Abstract translation: 提供了一种能够在提高可靠性和可用性的同时将系统性能的恶化最小化的存储子系统。 该存储子系统包括用于控制经由多个第一开关装置连接的多个驱动单元的第一控制器，以及用于控制通过与多个第一开关装置相关联的多个第二开关装置连接的多个驱动单元的第二控制器。 该存储子系统还包括连接多个第一交换设备和相应的多个第二交换设备的连接路径。 当存储[sub]系统检测到故障发生时，会识别连接路径中的故障现场，并更改交换机设备的连接配置，以规避故障现场。

公开(公告)号：US20090031150A1

公开(公告)日：2009-01-29

申请号：US12010847

申请日：2008-01-30

Applicant: Tsutomu Koga

Inventor： Tsutomu Koga

IPC: G06F1/00

CPC classification number: G06F1/3203 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0685 ,  G06F3/0688 ,  Y02D10/154

Abstract: A storage controller that can maintain its performance and reduce power consumption and thereby realize large capacity and low power consumption, and a method for controlling such a storage controller are provided.The storage controller includes: a plurality of nonvolatile memory modules having a plurality of nonvolatile memory chips for storing data from a host computer; and a nonvolatile memory control unit for controlling data input to and output from the host computer by controlling a power source for the nonvolatile memory modules; wherein when reading or writing data from or to a designated nonvolatile memory module at a specified time in response to a data read/write request from the host computer, the nonvolatile memory control unit controls the power source for only the designated nonvolatile memory module to be turned on.

Abstract translation: 一种存储控制器，其可以保持其性能并降低功耗，从而实现大容量和低功耗，并且提供了一种用于控制这种存储控制器的方法。 存储控制器包括：多个非易失性存储器模块，具有用于存储来自主计算机的数据的多个非易失性存储器芯片; 以及非易失性存储器控制单元，用于通过控制用于所述非易失性存储器模块的电源来控制输入到所述主计算机和从所述主计算机输出的数据; 其中当响应于来自所述主计算机的数据读/写请求在指定时间从指定的非易失存储器模块读取数据或向其指定非易失存储器模块时，非易失性存储器控制单元仅将所指定的非易失性存储器模块的电源控制为 打开。