公开(公告)号：US20130061029A1

公开(公告)日：2013-03-07

申请号：US13309662

申请日：2011-12-02

Applicant: Gregory L. Huff ,  Timothy E. Hoglund ,  Brad D. Besmer ,  Mark J. Jander ,  Edward F. Marchand ,  Jason C. McGinley

Inventor： Gregory L. Huff ,  Timothy E. Hoglund ,  Brad D. Besmer ,  Mark J. Jander ,  Edward F. Marchand ,  Jason C. McGinley

IPC: G06F15/177

CPC classification number: G06F9/4408 ,  G06F9/24

Abstract: The present invention is directed to a boot appliance for a data storage system. The boot appliance is a self-contained, pre-configured device that serves as a boot device for multiple servers. The boot appliance contains multiple hard drives which are configured into one or more RAID volumes. Each volume is divided into multiple partitions, with each partition serving as the boot drive for any server connected to it. The boot appliance provides its own environmental controls and Ethernet connection which may be used for providing alerts regarding the health of the components of the boot appliance and/or data storage system to a monitoring system, such as a network management system. The boot appliance may provide a boot drive and operating system image to multiple servers at the same time.

Abstract translation: 本发明涉及用于数据存储系统的引导装置。 引导设备是一个独立的预配置设备，可用作多个服务器的引导设备。 引导设备包含配置为一个或多个RAID卷的多个硬盘驱动器。 每个卷分为多个分区，每个分区用作连接到它的任何服务器的引导驱动器。 引导设备提供其自己的环境控制和以太网连接，其可用于向诸如网络管理系统的监视系统提供关于引导设备和/或数据存储系统的组件的健康状况的警报。 引导设备可以同时向多个服务器提供引导驱动器和操作系统映像。

公开(公告)号：US20100318711A1

公开(公告)日：2010-12-16

申请号：US12482123

申请日：2009-06-10

Applicant: Bret S. Weber ,  Timothy E. Hoglund ,  Mohamad El-Batal

Inventor： Bret S. Weber ,  Timothy E. Hoglund ,  Mohamad El-Batal

IPC: G06F13/28 ,  G06F13/36

CPC classification number: G06F13/28 ,  G06F3/0655

Abstract: Disclosed is a method that simultaneously transfers DMA data from a peripheral device to a hardware assist function and processor memory. A first DMA transfer is configured to transfer data from the peripheral to a peripheral DMA engine. While receiving the data, the DMA engine simultaneously transfers this data to processor memory. The DMA engine also transfers a copy of the data to a hardware assist function. The DMA engine may also simultaneously transfer data from processor memory to a peripheral device while transferring a copy to a hardware assist function.

Abstract translation: 公开了一种从外围设备同时传送DMA数据到硬件辅助功能和处理器存储器的方法。 第一个DMA传输配置为将数据从外设传输到外设DMA引擎。 DMA引擎在接收数据的同时将该数据传输到处理器存储器。 DMA引擎还将数据副本传送到硬件辅助功能。 DMA引擎还可以在将副本传送到硬件辅助功能的同时将数据从处理器存储器传输到外围设备。

公开(公告)号：US20100306452A1

公开(公告)日：2010-12-02

申请号：US12476386

申请日：2009-06-02

Applicant: Bret S. Weber ,  Timothy E. Hoglund ,  Robert E. Ober

Inventor： Bret S. Weber ,  Timothy E. Hoglund ,  Robert E. Ober

IPC: G06F12/00 ,  G06F12/08 ,  G06F12/02

CPC classification number: G06F12/0246 ,  G06F3/0607 ,  G06F3/0632 ,  G06F3/0685 ,  G06F3/0688 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7211

Abstract: Disclosed is a storage system. The storage system includes a redundant array of inexpensive disks (RAID) controller. The RAID controller includes a flash memory controller coupled to a flash memory. The flash memory controller may perform background management tasks. These include logging and error reporting, address translation, cache table management, bad block management, defect management, wear leveling, and garbage collection. The array controller also allows the flash memory to be divided into multiple mappings.

Abstract translation: 公开了一种存储系统。 存储系统包括廉价磁盘冗余阵列（RAID）控制器。 RAID控制器包括耦合到闪速存储器的闪存控制器。 闪存控制器可以执行后台管理任务。 这些包括日志记录和错误报告，地址转换，缓存表管理，坏块管理，缺陷管理，损耗均衡和垃圾收集。 阵列控制器还允许将闪存分为多个映射。

公开(公告)号：US07590819B2

公开(公告)日：2009-09-15

申请号：US11124536

申请日：2005-05-09

Applicant: Stephen B. Johnson ,  Brad D. Besmer ,  Timothy E. Hoglund ,  Jana L. Richards

Inventor： Stephen B. Johnson ,  Brad D. Besmer ,  Timothy E. Hoglund ,  Jana L. Richards

IPC: G06F12/00 ,  G06F9/26 ,  G06F9/34

CPC classification number: G06F12/0292

Abstract: A memory management unit (MMU) for a device controller that provides enhanced functionality while maintaining a small physical size or footprint, such that the die size required to manufacture the memory management unit circuitry within the device controller integrated circuit device remains small notwithstanding such enhanced functionality. This compact/tiny MMU provides virtual memory addressing and memory error detection functionality while maintaining a small physical die size. The small physical die size with enhanced functionality is obtained by improvements in translating virtual to physical addressing without use of extensive translation tables, which themselves would otherwise consume memory and associated die real estate. In addition, the MMU allows a firmware image containing code and data segments to be run-time swapped between internal shared context RAM and external memory.

Abstract translation: 一种用于设备控制器的存储器管理单元（MMU），其在保持小的物理尺寸或占地面积的同时提供增强的功能，使得制造设备控制器集成电路设备内的存储器管理单元电路所需的管芯尺寸仍然很小，尽管具有这种增强的功能 。 这种紧凑型/微型MMU提供虚拟内存寻址和内存错误检测功能，同时保持较小的物理裸片大小。 具有增强功能的小型物理尺寸通过改进虚拟到物理寻址的改进而获得，而不使用广泛的翻译表，其本身将消耗存储器和相关的裸片空间。 此外，MMU允许包含代码和数据段的固件映像在内部共享上下文RAM和外部存储器之间进行运行时交换。

公开(公告)号：US06570853B1

公开(公告)日：2003-05-27

申请号：US09679506

申请日：2000-10-04

Applicant: Stephen M. Johnson ,  Timothy E. Hoglund ,  David M. Weber ,  John M. Adams ,  Mark A. Reber

Inventor： Stephen M. Johnson ,  Timothy E. Hoglund ,  David M. Weber ,  John M. Adams ,  Mark A. Reber

IPC: H04L1228

CPC classification number: H04L47/39 ,  H04L47/10 ,  H04L47/286 ,  H04L47/30 ,  H04L67/1097

Abstract: A method and apparatus in a source node for transmitting data to a target node. Responsive to a request to transmit data to the target node, a determination is made as to whether a selected period of time has passed without data transmitted from the source node being received by the target node. Responsive to detecting the selected period of time has passed without data transmitted from the source node being received by the target node, a determination is made as to whether space is available in the target node to receive the data. Responsive to a determination that space is unavailable in the target node, generating an indication that the target node is blocked is generated.

Abstract translation: 源节点中用于向目标节点发送数据的方法和装置。 响应于向目标节点发送数据的请求，确定是否已经过去了所选择的时间段，而没有从源节点发送的数据被目标节点接收。 响应于检测所选择的时间段已经过去，没有从目标节点接收到的源节点发送的数据，确定目标节点中的空间是否可用于接收数据。 响应于确定目标节点中的空间不可用，生成目标节点被阻止的指示。

公开(公告)号：US08751718B2

公开(公告)日：2014-06-10

申请号：US11374359

申请日：2006-03-13

Applicant: Patrick R. Bashford ,  Timothy E. Hoglund

Inventor： Patrick R. Bashford ,  Timothy E. Hoglund

IPC: G06F13/14

CPC classification number: G06F13/385

Abstract: Apparatus and associated methods for a simplified multi-client initiator/target within a SAS device. Features and aspects hereof provide a simplified initiator/target component to enable cost reduction and simplification of SAS devices requiring only limited initiator/target functionality. In one embodiment, a SAS expander may incorporate simplified SSP/STP/SMP initiator/target features and aspects hereof to permit simple management of devices coupled to the expander or coupled downstream through other expanders. The simplified multi-client initiator/target suffices for simple management functions while reducing cost and complexity of the SAS expander. Features and aspects hereof may be implemented with shared circuits for each of multiple client protocols coupled with firmware operable in a general or special purpose processor embedded in the SAS device.

Abstract translation: SAS设备中简化的多客户端启动器/目标的设备和相关方法。 其特征和方面提供了简化的启动器/目标组件，以实现仅限于有限的启动器/目标功能的SAS设备的成本降低和简化。 在一个实施例中，SAS扩展器可以并入简化的SSP / STP / SMP启动器/目标特征和方面，以允许简单管理耦合到扩展器的设备或者通过其他扩展器耦合到下游。 简化的多客户端启动器/目标器可满足简单的管理功能，同时降低SAS扩展器的成本和复杂性。 本发明的特征和方面可以与用于在嵌入在SAS设备中的通用或专用处理器中可操作的固件耦合的多个客户端协议中的每一个共享电路实现。

公开(公告)号：US08260980B2

公开(公告)日：2012-09-04

申请号：US12482123

申请日：2009-06-10

Applicant: Bret S. Weber ,  Timothy E. Hoglund ,  Mohamad El-Batal

Inventor： Bret S. Weber ,  Timothy E. Hoglund ,  Mohamad El-Batal

IPC: G06F13/28 ,  G06F15/167

CPC classification number: G06F13/28 ,  G06F3/0655

Abstract: Disclosed is a method that simultaneously transfers DMA data from a peripheral device to a hardware assist function and processor memory. A first DMA transfer is configured to transfer data from the peripheral to a peripheral DMA engine. While receiving the data, the DMA engine simultaneously transfers this data to processor memory. The DMA engine also transfers a copy of the data to a hardware assist function. The DMA engine may also simultaneously transfer data from processor memory to a peripheral device while transferring a copy to a hardware assist function.

Abstract translation: 公开了一种从外围设备同时传送DMA数据到硬件辅助功能和处理器存储器的方法。 第一个DMA传输配置为将数据从外设传输到外设DMA引擎。 DMA引擎在接收数据的同时将该数据传输到处理器存储器。 DMA引擎还将数据副本传送到硬件辅助功能。 DMA引擎还可以在将副本传送到硬件辅助功能的同时将数据从处理器存储器传输到外围设备。

公开(公告)号：US20120159239A1

公开(公告)日：2012-06-21

申请号：US13083394

申请日：2011-04-08

Applicant: Peter B. Chon ,  James Yu ,  David M. Olson ,  Timothy E. Hoglund ,  Gary J. Piccirillo

Inventor： Peter B. Chon ,  James Yu ,  David M. Olson ,  Timothy E. Hoglund ,  Gary J. Piccirillo

IPC: G06F12/16 ,  G06F11/14

CPC classification number: G06F11/1441 ,  G06F1/30 ,  G06F11/1052

Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.

Abstract translation: 公开了电力隔离和备用系统。 当检测到电源故障条件时，临时存储器被刷新到SDRAM。 在刷新之后，接口被停止，除了SDRAM子系统之外的大多数芯片的电源被去除。 SDRAM子系统将数据从SDRAM复制到闪存。 在路上，数据可以被加密，和/或计算数据完整性签名。 为了恢复数据，SDRAM子系统将数据从闪存复制到SDRAM。 一路上，正在恢复的数据可能被解密，和/或检查数据完整性签名。

公开(公告)号：US08200922B2

公开(公告)日：2012-06-12

申请号：US12316902

申请日：2008-12-17

Applicant: Brian McKean ,  Mohamad El-Batal ,  Bret S. Weber ,  John Dietterich ,  Jeffrey S Werning ,  Timothy E. Hoglund

Inventor： Brian McKean ,  Mohamad El-Batal ,  Bret S. Weber ,  John Dietterich ,  Jeffrey S Werning ,  Timothy E. Hoglund

IPC: G06F12/00

CPC classification number: G06F11/1466 ,  G06F12/0246 ,  G06F2212/7201

Abstract: A method and apparatus for taking a snapshot of a storage system employing a solid state disk (SSD). A plurality of mapping tables in the SSD store data needed to create a one or more point in time snapshots and a current view of the SSD. In response to a write command, the SSD executes its normal write process and updates its mapping tables to indicate the current view of the SSD and additionally retains the original data in a table of pointers to the original data, as the snapshot of an earlier state of the SSD. In the preferred embodiment, the innate ability of SSDs to write data to a new location is used to perform a point-in-time copy with little or no loss in performance in performing the snapshot.

Abstract translation: 一种用于拍摄采用固态盘（SSD）的存储系统的快照的方法和装置。 SSD中的多个映射表存储创建一个或多个时间点快照和SSD的当前视图所需的数据。 响应于写入命令，SSD执行其正常写入处理并更新其映射表以指示SSD的当前视图，并且将原始数据另外保留在指向原始数据的指针表中，作为较早状态的快照 的SSD。 在优选实施例中，SSD用于将数据写入新位置的固有能力用于执行时间点复制，而在执行快照时性能很少或没有损失。

公开(公告)号：US08131933B2

公开(公告)日：2012-03-06

申请号：US12258907

申请日：2008-10-27

Applicant: Brian A. Day ,  Timothy E. Hoglund

Inventor： Brian A. Day ,  Timothy E. Hoglund

IPC: G06F12/00

CPC classification number: G06F3/0661 ,  G06F3/0607 ,  G06F3/0689 ,  G06F12/0866 ,  H04L67/1095 ,  H04L67/1097

Abstract: Methods and systems for communication between two storage controllers. A first storage controller specifies a special frame indicator in a frame of a protocol that is also used by a first storage controller to send a storage command to a storage device. The first storage controller transmits the frame to a second storage controller such that the frame comprises data in a payload field of the frame.

Abstract translation: 两个存储控制器之间通信的方法和系统。 第一存储控制器在协议的帧中指定特殊帧指示符，其也由第一存储控制器用于向存储设备发送存储命令。 第一存储控制器将帧发送到第二存储控制器，使得帧包括帧的有效载荷字段中的数据。