Transistor circuit having a plurality of constant current sources
    11.
    发明授权
    Transistor circuit having a plurality of constant current sources 失效
    晶体管电路具有多个恒定电流源

    公开(公告)号:US4150309A

    公开(公告)日:1979-04-17

    申请号:US778619

    申请日:1977-03-17

    Applicant: Kazuo Tokuda

    Inventor: Kazuo Tokuda

    CPC classification number: G05F3/20 G05F3/222 H03F3/343 H03F3/347

    Abstract: A transistor circuit having a plurality of constant current sources wherein a compensating resistor of a predetermined value is inserted between the base of the transistor of one of the constant current sources and a reference voltage supply terminal. The compensating resistor serves to equalize the current variation between currents flowing through first and second resistive loads and thereby equalizes D.C. circuit output potentials for the circuits being driven by the constant current sources. This equalization is achieved irrespective of variations in transistor current gain due to temperature fluctuation or manufacturing error.

    Abstract translation: 一种具有多个恒定电流源的晶体管电路,其中在一个恒定电流源的晶体管的基极和参考电压提供端子之间插入预定值的补偿电阻器。 补偿电阻器用于均衡流过第一和第二电阻负载的电流之间的电流变化,从而使由恒定电流源驱动的电路的直流电路输出电位相等。 不管由于温度波动或制造误差导致的晶体管电流增益的变化,都实现了这种均衡。

    Variable gain amplifier
    12.
    发明授权
    Variable gain amplifier 失效
    可变增益放大器

    公开(公告)号:US5113149A

    公开(公告)日:1992-05-12

    申请号:US702628

    申请日:1991-05-17

    CPC classification number: H03G3/10 H03G1/0023

    Abstract: A variable gain amplifier has a first amplifier circuit whose gain is A/n times (A being a real number excepting "0", and n being a real number larger than 1); a second amplifier circuit whose gain is A(n-1/n) times; level converter for level converting an output signal from the second amplifier circuit at a ratio corresponding to a level of a gain control signal having a predetermined level controllable range and at a ratio of 1/(n+1) at a central level within the level controllable range of the gain control signal; and an adder circuit for adding together an output signal from the level converter and an output signal from the first amplifier circuit at the ratio of 1:1. The variable gain amplifier has a gain controllable range of among 1/n.about.1.about.n times as the level of the gain control signal changes among the minimum level.about.the central level.about.the maximum level. When the gain of the second amplifier circuit is set to A(m-1/n) times (m being a real number larger than 1) and a level conversion ratio of the level converter is set to (1-1/n)/(m-1/n) at the central level of the gain control signal, the variable gain amplifer having the gain controllable range of among A/n.about.A.about.mA times is realized.

    Trigger pulse generator circuit
    13.
    发明授权
    Trigger pulse generator circuit 失效
    触发脉冲发生器电路

    公开(公告)号:US3980901A

    公开(公告)日:1976-09-14

    申请号:US546174

    申请日:1975-01-31

    Applicant: Kazuo Tokuda

    Inventor: Kazuo Tokuda

    CPC classification number: H03K5/1534

    Abstract: A trigger pulse generator circuit for converting an input pulse into a sharp pulse to be used as a trigger pulse is disclosed. The input pulse is applied to a first and a second switching means which are connected in cascade, the second switching means having a larger delay time than that of the first switching means. An output trigger pulse is derived from a connecting point of the first and second switching means. The first switching means becomes cut-off in response to the removal of the input pulse, while the second switching means becomes cut-off a predetermined time after the removal of the input pulse due to a time delay caused by the storage time of a transistor of the second switching means. In consequence, a sharp trigger pulse is derived from the output terminal. Preferably, a discharging means for the charge stored in the second switching means is further provided between the ground and the second switching means. This trigger pulse generator circuit is advantageous in that no capacitive element is necessitated, and so it is quite suitable for application to an integrated circuit.

    Abstract translation: 公开了一种用于将输入脉冲转换为尖锐脉冲以用作触发脉冲的触发脉冲发生器电路。 输入脉冲被施加到级联的第一和第二开关装置,第二开关装置具有比第一开关装置的延迟时间更大的延迟时间。 从第一和第二开关装置的连接点导出输出触发脉冲。 第一开关装置响应于输入脉冲的去除而被切断,而第二开关装置在由于晶体管的存储时间引起的时间延迟而导致的输入脉冲的去除之后的预定时间内被切断 的第二开关装置。 因此,从输出端导出尖锐的触发脉冲。 优选地,在地面和第二切换装置之间还设置用于存储在第二开关装置中的电荷的放电装置。 该触发脉冲发生器电路的优点在于不需要电容元件,因此非常适用于集成电路。

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