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公开(公告)号：US20240355286A1
公开(公告)日：2024-10-24
申请号：US18682942
申请日：2022-03-24
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU
IPC: G09G3/3233 , G11C19/28
CPC classification number: G09G3/3233 , G11C19/287 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
Abstract: A display panel includes pixel driving circuits distributed in an array and forming pixel driving circuit groups, each pixel driving circuit group includes pixel driving circuit rows with each including pixel driving circuits, each of which includes a driving circuit connected to a first, second and third nodes, to input a driving current to the third node through the second node in response to a signal of the first node; a first switching unit with a first end connected to a first power supply terminal and second end connected to the second node, to connect the first power supply terminal and the second node in response to a pulse width modulation signal; in a same pixel driving circuit group, a second end of any first switching unit is connected to a second end of at least one first switching unit in each of the other pixel driving circuit rows.
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152.发明公开公开(公告)号：US20240282279A1
公开(公告)日：2024-08-22
申请号：US18650848
申请日：2024-04-30
Inventor： Xuehuan FENG , Yongqian LI
CPC classification number: G09G3/3677 , G09G3/2092 , G09G2310/0286 , G09G2310/08
Abstract: A shift register circuit includes an input sub-circuit, an output sub-circuit and a control sub-circuit. The input sub-circuit is coupled to a first input signal terminal and a pull-up node, and configured to, under control of a first input signal, transmit the first input signal to the pull-up node. The output sub-circuit is at least coupled to the pull-up node, a first clock signal terminal and a first signal output terminal, and configured to transmit a first clock signal to the first signal output terminal under control of a voltage at the pull-up node. The control sub-circuit is coupled to at least one first reference node, at least one first control signal terminal and the pull-up node, and configured to transmit a voltage at a first reference node to the pull-up node under control of a first control signal.
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公开(公告)号：US20240268148A1
公开(公告)日：2024-08-08
申请号：US17914686
申请日：2021-11-18
Inventor： Zhidong YUAN , Pan XU , Jun LIU , Can YUAN , Yongqian LI
IPC: H10K59/121 , H10K59/12 , H10K59/131
CPC classification number: H10K59/1213 , H10K59/1201 , H10K59/1216 , H10K59/131
Abstract: A display panel includes a plurality of sub-pixels, a sub-pixel includes a pixel driving circuit, and the pixel driving circuit includes at least a driving transistor and a storage capacitor. The display panel further includes a substrate, and a first gate conductive layer, a semiconductor layer and a second gate conductive layer that are disposed on the substrate. The first gate conductive layer includes a first electrode plate of the storage capacitor. The semiconductor layer includes an active layer pattern of the driving transistor. At least part of the active layer pattern of the driving transistor and at least part of the first electrode plate are disposed in a same layer. The second gate conductive layer includes a second electrode plate of the storage capacitor and a gate electrode of a driving transistor electrically connected to the second electrode plate.
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公开(公告)号：US20240260343A1
公开(公告)日：2024-08-01
申请号：US18018550
申请日：2022-02-25
Inventor： Zhidong YUAN , Yongqian LI , Li SUN , Liu WU , Can YUAN
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: A display substrate and a display apparatus are provided, and the display substrate includes: a base substrate including a display area and a bonding area located at a side of the display area, the display area includes a first circuit signal line and a second circuit signal line, and the bonding area includes a bonding signal pin; a circuit structure layer located in the display area. The circuit structure layer includes at least one first circuit region and at least one second circuit region; the first circuit region includes at least one first gate drive circuit; the second circuit region includes at least one second gate drive circuit; the first gate drive circuit includes multiple cascaded first gate drive units, and the second gate drive circuit includes multiple cascaded second gate drive units; the multiple the first gate drive units are sequentially arranged along a second direction.
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公开(公告)号：US20240188349A1
公开(公告)日：2024-06-06
申请号：US17795447
申请日：2021-08-25
Inventor： Yongqian LI , Can YUAN , Xuehuan FENG
IPC: H10K59/126 , G09G3/3225 , H10K59/131
CPC classification number: H10K59/126 , G09G3/3225 , H10K59/131 , G09G2300/0842 , G09G2320/0223
Abstract: A display substrate and a display device. The display substrate includes a base substrate, and a plurality of pixel units and a plurality of scanning lines on the base substrate. Each pixel unit includes a plurality of sub-pixels and a light shielding layer, the plurality of sub-pixels is arranged in sequence in a first direction, each sub-pixel includes a sub-pixel driving circuitry and a light-emitting element coupled to each other, and the sub-pixel driving circuitry is configured to provide a driving signal to the light-emitting element. At least a part of the light shielding layer is arranged between the sub-pixel driving circuitry and the base substrate. Each scanning line includes at least a part extending in the first direction, is coupled to a corresponding sub-pixel driving circuitry, and is arranged at a same layer as the light shielding layer.
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Patent Agency Ranking
公开(公告)号：US20240074266A1
公开(公告)日：2024-02-29
申请号：US18500345
申请日：2023-11-02
Inventor： Zhongyuan WU , Yongqian LI , Zhidong YUAN , Meng LI , Can YUAN
IPC: H10K59/131 , H10K50/824 , H10K50/828 , H10K50/86 , H10K59/122 , H10K59/124 , H10K71/00
CPC classification number: H10K59/1315 , H10K50/824 , H10K50/828 , H10K50/865 , H10K59/122 , H10K59/124 , H10K59/131 , H10K71/00 , H10K59/1201
Abstract: A display panel includes: a substrate, including a display area and a peripheral area surrounding the display area; an auxiliary electrode layer, located on a side of the substrate, where the auxiliary electrode layer includes an auxiliary electrode in the display area and a connection portion in the peripheral area; and a data line layer, including multiple data lines in the display area and a peripheral line portion in the peripheral area; where in the display area, the multiple data lines and the auxiliary electrode are provided in a same layer; and where in the peripheral area, the peripheral line portion and the connection portion are provided in a same layer.
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157.发明公开公开(公告)号：US20240046858A1
公开(公告)日：2024-02-08
申请号：US17641991
申请日：2021-05-18
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN
IPC: G09G3/3225
CPC classification number: G09G3/3225 , G09G2310/08
Abstract: The present disclosure provides a multiplexing circuitry, a multiplexing method, a multiplexing module, and a display device. The multiplexing circuitry includes N multiplexing unit circuitries, N energy storage unit circuitries and N control unit circuitries. An nth multiplexing unit circuitry is configured to enable an nth output data line to be electrically coupled to or electrically decoupled from an input data line under the control of a potential at an nth control end; an nth energy storage unit circuitry is configured to control a potential at the nth control end in accordance with an nth clock signal; and an nth control unit circuitry is configured to enable the nth control end to be electrically coupled to or electrically decoupled from an nth switch control line in accordance with a control voltage signal and an nth switch control signal.
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公开(公告)号：US20240032355A1
公开(公告)日：2024-01-25
申请号：US17799918
申请日：2021-11-12
Inventor： Luke DING , Yongqian LI
IPC: H10K59/131 , G09G3/3233 , H10K59/124 , H10K59/12
CPC classification number: H10K59/131 , G09G3/3233 , H10K59/124 , H10K59/1201 , G09G2300/0819 , G09G2300/0842 , G09G2310/08
Abstract: A display substrate and a display device are provided. The display substrate includes a light emitting element disposed on a base substrate, and an encapsulation layer, a connection layer, a light extraction layer, a polarization conversion layer and a polarization layer stacked sequentially at a light exiting side of the light emitting element. The light extraction layer is configured to convert at least a portion of light emitted by the light emitting element incident onto the light extraction layer into circularly polarized light with a set rotational direction to pass through the light extraction layer. The polarization conversion layer is configured to convert the circularly polarized light passing through the light extraction layer into linearly polarized light, with a polarization direction parallel to a direction of a light transmission axis of the polarization layer; the connection layer is configured to bond the light extraction layer to the encapsulation layer.
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公开(公告)号：US20230260586A1
公开(公告)日：2023-08-17
申请号：US17417518
申请日：2020-12-29
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Wenchao BAO
IPC: G11C19/28 , G09G3/3266
CPC classification number: G11C19/28 , G09G3/3266 , G09G2310/0286
Abstract: The present disclosure provides a shift register unit, a driving method, a gate driving circuit and a display device. The shift register unit includes a pull-down node control circuit; the pull-down node control circuit is electrically connected to an input terminal, a reset terminal, a first voltage terminal, a second voltage terminal and a pull-down node, respectively, and is configured to, under the control of an input signal provided by the input terminal and a reset signal provided by the reset terminal, control the pull-down node to be electrically conducted to the first voltage terminal or the second voltage terminal, and control to hold a potential of the pull-down node.
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公开(公告)号：US20230215331A1
公开(公告)日：2023-07-06
申请号：US18119787
申请日：2023-03-09
Inventor： Xuehuan FENG , Yongqian LI
CPC classification number: G11C19/28 , G09G3/20 , G09G2310/0286
Abstract: A shift register comprises a first shift register unit and a second shift register unit. The first shift register unit comprises a first input circuit connected to a first input terminal and a first pull-up node, a first output circuit connected to the first pull-up node, a first output terminal and a first clock terminal, and a first pull-down circuit. The second shift register unit comprises a second input circuit connected to a second input terminal and a second pull-up node, and a second output circuit connected to the second pull-up node, a second output terminal and a second clock signal.
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