公开(公告)号：US12108643B2

公开(公告)日：2024-10-01

申请号：US17953941

申请日：2022-09-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangnan Lu ,  Guangliang Shang ,  Can Zheng ,  Yu Feng ,  Libin Liu ,  Jie Zhang ,  Mei Li

IPC: H10K59/131 ,  G09G3/3208 ,  H10K59/121

CPC classification number: H10K59/131 ,  H10K59/121 ,  G09G3/3208 ,  G09G2320/0209 ,  G09G2320/0233

Abstract: Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein in the peripheral area, the source/drain layer includes at least one pair of first signal lines including a signal line of a gate circuit and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.

公开(公告)号：US12052901B2

公开(公告)日：2024-07-30

申请号：US17310325

申请日：2021-03-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Libin Liu ,  Mei Li ,  Shiming Shi ,  Li Wang

IPC: H10K59/35 ,  H10K50/80 ,  H10K59/122 ,  H10K59/131 ,  H10K71/00 ,  H10K59/12

CPC classification number: H10K59/353 ,  H10K50/80 ,  H10K59/122 ,  H10K59/131 ,  H10K59/352 ,  H10K71/00 ,  H10K59/1201

Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a display area and a non-display area located at a periphery of the display area, wherein the display area includes a plurality of pixel opening areas and a pixel spacing area located between the pixel opening areas; the display substrate further includes: a first electrode, wherein at least part of the first electrode is located in the pixel spacing area, an orthographic projection of the first electrode on a substrate of the display substrate does not overlap an orthographic projection of the pixel opening area on the substrate; and a second electrode electrically connected to the first electrode and located in the non-display area.

公开(公告)号：US11937465B2

公开(公告)日：2024-03-19

申请号：US17630908

申请日：2021-03-11

Applicant: BOE Technology Group Co., Ltd.

Inventor： Libin Liu ,  Jiangnan Lu

IPC: H10K59/124 ,  G09G3/3233

CPC classification number: H10K59/124 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0233

Abstract: Embodiments of the present disclosure relate to the field of display technology, and in particular, to an array substrate, a display panel and a display device thereof. The array substrate includes a substrate and a plurality of sub-pixels on the substrate. Each sub-pixel includes a pixel circuit. The pixel circuit includes a plurality of transistors. The plurality of transistors includes at least one oxide transistor. The array substrate further includes: an oxide semiconductor layer on the substrate, the oxide semiconductor layer comprising a channel region of the oxide transistor; a first planarization layer on the substrate and covering at least a portion of the oxide semiconductor layer; a barrier part on the side of the first planarization layer away from the substrate.

公开(公告)号：US11875748B2

公开(公告)日：2024-01-16

申请号：US17433668

申请日：2021-02-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang Shang ,  Tian Dong ,  Xinshe Yin ,  Mei Li ,  Libin Liu ,  Shiming Shi

IPC: G11C19/28 ,  G09G3/3266 ,  G09G3/3233 ,  G09G3/20

CPC classification number: G09G3/3266 ,  G11C19/28 ,  G09G3/20 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2320/0247 ,  G09G2330/021

Abstract: Provided are a gate driving circuit, a display substrate, a display device and a gate driving method, the gate driving circuit includes: a frequency doubling control circuit and an effective output circuit including first shift registers, the first shift register at the first stage has a first signal input terminal coupled with an output control signal line and a second signal input terminal coupled with the frequency doubling control circuit; the frequency doubling control circuit is coupled to the output control signal line, for providing a frequency doubling control signal thereto after a preset time period from the receipt of the output control signal in response to an output control signal from the output control signal line; the first shift register at the first stage outputs a scanning signal in response to the output control signal and a scanning signal in response to the frequency doubling control signal.

公开(公告)号：US11875747B2

公开(公告)日：2024-01-16

申请号：US17793841

申请日：2021-05-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lujiang Huangfu ,  Li Wang ,  Can Zheng ,  Tian Dong ,  Libin Liu

IPC: G09G3/3258 ,  G09G3/3233

CPC classification number: G09G3/3258 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/0251 ,  G09G2310/0262 ,  G09G2310/061 ,  G09G2320/0214 ,  G09G2320/0233 ,  G09G2320/0238 ,  G09G2320/0247 ,  G09G2320/043

Abstract: A pixel driving circuit includes: an energy storage sub-circuit, a reset sub-circuit, a compensation sub-circuit, a driving sub-circuit, and a current leakage suppression sub-circuit. The energy storage sub-circuit is coupled to a first node and a second node. The reset sub-circuit is coupled to the second node, a first scan timing signal terminal, and an initialization signal terminal. The compensation sub-circuit is coupled to the second node, a third node, and a second scan timing signal terminal. The driving sub-circuit is coupled to the second node, the third node, and a first voltage signal terminal. The current leakage suppression sub-circuit is coupled to the energy storage sub-circuit, the reset sub-circuit, and the compensation sub-circuit. The current leakage suppression sub-circuit is configured to suppress current leakage of the energy storage sub-circuit in a process of generating and transmitting the driving signal by the driving sub-circuit.

公开(公告)号：US11875722B2

公开(公告)日：2024-01-16

申请号：US17771102

申请日：2021-05-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yuhan Qian ,  Libin Liu ,  Long Han

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/2092 ,  G11C19/28 ,  G09G2300/0452 ,  G09G2300/0852 ,  G09G2310/0286

Abstract: A display panel and a display device. The display panel comprises a transition region, and further comprises: a base substrate; multiple pixel units located on the side of the base substrate and integrated in the transition region; and a first gate drive circuit located on the side of the base substrate facing the pixel units, integrated in the transition region, and comprising a first shift register unit and a first signal line group. The first signal line group comprises a first signal line segment group used for providing a drive signal for the first shift register unit. The base substrate comprises multiple integration portions which are located between orthographic projections of two adjacent pixel units in the same row on the base substrate.

公开(公告)号：US11862098B2

公开(公告)日：2024-01-02

申请号：US17628779

申请日：2021-04-09

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangliang Shang ,  Jie Zhang ,  Shuo Huang ,  Libin Liu ,  Shiming Shi ,  Hao Liu ,  Haoliang Zheng ,  Xing Yao

IPC: G09G3/3266 ,  G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3266 ,  G09G3/3677 ,  G11C19/28 ,  G09G2300/0852 ,  G09G2310/0286

Abstract: A shift register, a driving method, a driving control circuit and a display device. The method comprises: at a data refresh stage (T10), applying to an input signal end (IP) an input signal having a pulse level, applying a control clock pulse signal to a control clock signal end, and applying a noise reduction clock pulse signal to a noise reduction clock signal end; at a noise reduction holding phase (T21-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a fixed voltage signal to the noise reduction clock signal end; and at a noise reduction enhancement stage (T22-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a clock pulse signal to the noise reduction clock signal end.

公开(公告)号：US11837142B2

公开(公告)日：2023-12-05

申请号：US17638836

申请日：2021-02-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Long Han ,  Libin Liu ,  Lujiang Huangfu

IPC: G09G3/20 ,  G09G3/3233

CPC classification number: G09G3/2074 ,  G09G3/3233 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0465 ,  G09G2300/0819 ,  G09G2310/0202 ,  G09G2310/08 ,  G09G2320/066

Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of initialization signal lines and a plurality of connection lines. The initialization signal lines are arranged in a conductive layer, extend along a first direction and are arranged at intervals along a second direction, and are used to provide initialization signals to the sub-pixels. The connection lines are arranged in another conductive layer, extend along the second direction and are arranged at intervals along the first direction. Projections of at least one initialization signal line and at least one connection line on the base substrate intersect, and the at least one initialization signal line and the at least one connection line are connected through a via hole, so that the projections of the initialization signal lines and the connection lines on the substrate form a grid-like structure.

公开(公告)号：US11798458B2

公开(公告)日：2023-10-24

申请号：US17905620

申请日：2021-08-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang Shang ,  Jie Zhang ,  Jiangnan Lu ,  Mei Li ,  Libin Liu

IPC: G09G3/3266 ,  G09G3/20

CPC classification number: G09G3/2092 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2330/021

Abstract: A gate driving unit includes a first input node control circuit and a charge pump circuit; the first input node control circuit is configured to connect or disconnect the between an input terminal and the first input node under control of a clock signal provided by the clock signal terminal; the charge pump circuit is configured to control to convert a voltage signal of the first input node into a voltage signal of the first node under the control of an input clock signal provided by the input clock signal terminal when the voltage signal of the first input node is a first voltage signal, so that a polarity of the voltage signal of the first input is the same as a polarity of the voltage signal of the first input node, and an absolute value of the voltage value of the voltage signal of the first node is greater than an absolute value of a voltage value of the voltage signal of the first input node.

公开(公告)号：US11756486B2

公开(公告)日：2023-09-12

申请号：US16766094

申请日：2019-07-01

Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Weiyun Huang ,  Libin Liu ,  Chao Zeng ,  Yao Huang ,  Meng Li ,  Yue Long

IPC: G09G3/3266 ,  G09G3/00 ,  G09G3/3233

CPC classification number: G09G3/3266 ,  G09G3/035 ,  G09G3/3233 ,  G09G2300/0804 ,  G09G2300/0842 ,  G09G2310/0221 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2330/023

Abstract: A display panel, a display device and a driving method are disclosed, the display panel includes a plurality of display regions, the plurality of display regions include a first display region and a second display region, the first display region includes rows of first pixel units, the second display region includes rows of second pixel units; the display panel further includes a first light-emission control scan driving circuit for controlling the rows of first pixel units to emit light, and a second light-emission control scan driving circuit for controlling the rows of second pixel units to emit light, and the driving method includes: providing a first start signal to the first light-emission control scan driving circuit, and providing a second start signal to the second light-emission control scan driving circuit; the second start signal and the first start signal are applied independently, respectively.