公开(公告)号：US20120037884A1

公开(公告)日：2012-02-16

申请号：US13250558

申请日：2011-09-30

Applicant: HONG ZHONG ,  ANURAG TYAGI ,  JAMES S. SPECK ,  STEVEN P. DENBAARS ,  SHUJI NAKAMURA

Inventor： HONG ZHONG ,  ANURAG TYAGI ,  JAMES S. SPECK ,  STEVEN P. DENBAARS ,  SHUJI NAKAMURA

IPC: H01L33/06 ,  B82Y40/00 ,  B82Y99/00

CPC classification number: H01L33/18 ,  H01L33/02

Abstract: A light emitting diode (LED) having a p-type layer having a thickness of 100 nm or less, an n-type layer, and an active layer, positioned between the p-type layer and the n-type layer, for emitting light, wherein the LED does not include a separate electron blocking layer.

Abstract translation: 具有厚度为100nm以下的p型层的发光二极管（LED），位于p型层和n型层之间的n型层和有源层，用于发光 ，其中LED不包括单独的电子阻挡层。

公开(公告)号：US20120018853A1

公开(公告)日：2012-01-26

申请号：US13247866

申请日：2011-09-28

Applicant: ADELE TAMBOLI ,  EVELYN LYNN HU ,  MATHEW C. SCHMIDT ,  SHUJI NAKAMURA ,  STEVEN P. DENBAARS

Inventor： ADELE TAMBOLI ,  EVELYN LYNN HU ,  MATHEW C. SCHMIDT ,  SHUJI NAKAMURA ,  STEVEN P. DENBAARS

IPC: H01L29/06 ,  H01L21/306

CPC classification number: H01L21/30617 ,  H01L29/2003 ,  H01L33/0075

Abstract: A method for photoelectrochemical (PEC) etching of a p-type semiconductor layer simply and efficiently, by providing a driving force for holes to move towards a surface of a p-type cap layer to be etched, wherein the p-type cap layer is on a heterostructure and the heterostructure provides the driving force from an internal bias generated internally in the heterostructure; generating electron-hole pairs in a separate area of the heterostructure than the surface to be etched; and using an etchant solution to etch the surface of the p-type layer.

Abstract translation: 通过提供用于孔朝向待蚀刻的p型盖层的表面移动的驱动力，简单有效地对p型半导体层进行光电化学（PEC）蚀刻的方法，其中p型覆盖层为 在异质结构上，异质结构从异质结构内部产生的内部偏压提供驱动力; 在异质结构的单独区域中产生电子 - 空穴对，而不是要蚀刻的表面; 并使用蚀刻剂溶液蚀刻p型层的表面。

公开(公告)号：US20120017054A1

公开(公告)日：2012-01-19

申请号：US13243435

申请日：2011-09-23

Applicant: Masahiro Arai ,  Kentaro Shimada ,  Shuji Nakamura

Inventor： Masahiro Arai ,  Kentaro Shimada ,  Shuji Nakamura

IPC: G06F12/00

CPC classification number: G06F3/0643 ,  G06F3/0608 ,  G06F3/0619 ,  G06F3/0641 ,  G06F3/067 ,  G06F11/1076 ,  G06F11/2089 ,  G06F2211/1004 ,  G06F2211/1057

Abstract: The present invention provides means for effectively reducing the amount of data by means of de-duplication in a disk array apparatus having a data guarantee code. A control means for the disk array apparatus that adds a data guarantee code to each logical data block and checks the data guarantee code when reading data has a de-duplication performing function and control means for: generating LA substitution information for a function checking the data guarantee code or read data location address substitution information when performing the de-duplication and storing data; performing the de-duplication using the above-mentioned information when reading data; and thereby avoiding false diagnosis of the data guarantee code check.

Abstract translation: 本发明提供了在具有数据保证码的磁盘阵列装置中通过重复数据删除来有效地减少数据量的装置。 一种用于对每个逻辑数据块添加数据保证码并在读取数据具有重复数据删除执行功能时检查数据保证代码的控制装置和控制装置，用于：产生用于检查数据的功能的LA替代信息 在执行重复数据删除和存储数据时，保证代码或读取数据位置地址替换信息; 在读取数据时使用上述信息执行重复数据删除; 从而避免数据保证代码检查的错误诊断。

公开(公告)号：US08086789B2

公开(公告)日：2011-12-27

申请号：US13030575

申请日：2011-02-18

Applicant: Katsuya Tanaka ,  Shuji Nakamura

Inventor： Katsuya Tanaka ,  Shuji Nakamura

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F1/324 ,  G06F1/3225 ,  G06F1/3275 ,  G06F1/3296 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/1027 ,  Y02D10/126 ,  Y02D10/14 ,  Y02D10/154 ,  Y02D10/172 ,  Y02D50/20

Abstract: A purpose of the invention is to immediately return the operation in a flash memory module from low power consumption mode to regular mode. A flash memory controller having memory that stores an address translation table for translating between a logical page address and a physical page address in the flash memory chip controls regular mode and low power consumption mode of operating at lower power consumption than in regular mode by halting operation, or decreasing power supply voltage or lowering operating frequency. A flash memory module having the flash memory controller verifies data in the address translation table while low power consumption mode is set.

Abstract translation: 本发明的目的是立即将闪存模块中的操作从低功耗模式返回到常规模式。 具有存储器的存储器，其存储用于在闪速存储器芯片中的逻辑页面地址和物理页面地址之间进行转换的地址转换表，通过停止操作来控制以比常规模式低的功耗操作的常规模式和低功耗模式 ，或降低电源电压或降低工作频率。 具有闪速存储器控制器的闪存模块在设置低功耗模式的同时对地址转换表中的数据进行验证。

公开(公告)号：US08080469B2

公开(公告)日：2011-12-20

申请号：US12234340

申请日：2008-09-19

Applicant: Asako Hirai ,  James S. Speck ,  Steven P. DenBaars ,  Shuji Nakamura

Inventor： Asako Hirai ,  James S. Speck ,  Steven P. DenBaars ,  Shuji Nakamura

IPC: H01L21/28

CPC classification number: C30B33/00 ,  C30B29/403 ,  H01L21/02389 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02658 ,  H01L29/2003

Abstract: A method for fabricating a high quality freestanding nonpolar and semipolar nitride substrate with increased surface area, comprising stacking multiple films by growing the films one on top of each other with different and non-orthogonal growth directions.

Abstract translation: 一种用于制造具有增加的表面积的高质量独立非极性和半极性氮化物衬底的方法，包括通过用不同的和非正交的生长方向将膜形成在一个层叠上来堆叠多个膜。

公开(公告)号：US20110289277A1

公开(公告)日：2011-11-24

申请号：US12526773

申请日：2009-03-30

Applicant: Masanori Takada ,  Shuji Nakamura ,  Kentaro Shimada

Inventor： Masanori Takada ,  Shuji Nakamura ,  Kentaro Shimada

IPC: G06F12/12

CPC classification number: G06F11/3447 ,  G06F11/3471 ,  G06F12/0802 ,  G06F12/123 ,  G06F2201/815 ,  G06F2201/88 ,  G06F2201/885

Abstract: The present invention obtains with high precision, in a storage system, the effect of additional installation or removal of cache memory, that is, the change of the cache hit rate and the performance of the storage system at that time. For achieving this, when executing normal cache control in the operational environment of the storage system, the cache hit rate when the cache memory capacity has changed is also obtained. Furthermore, with reference to the obtained cache hit rate, the peak performance of the storage system is obtained. Furthermore, with reference to the target performance, the cache memory and the number of disks and other resources that are additionally required are obtained.

Abstract translation: 本发明在存储系统中高精度地获得附加安装或移除高速缓冲存储器的效果，即高速缓存命中率的改变和存储系统的性能。 为了实现这一点，当在存储系统的操作环境中执行正常的高速缓存控制时，也获得高速缓存存储器容量已经改变时的高速缓存命中率。 此外，参考获得的高速缓存命中率，获得存储系统的峰值性能。 此外，参考目标性能，获得高速缓冲存储器以及另外需要的磁盘和其他资源的数量。

公开(公告)号：US08044417B2

公开(公告)日：2011-10-25

申请号：US12364258

申请日：2009-02-02

Applicant: Hisashi Masui ,  Hisashi Yamada ,  Kenji Iso ,  James S. Speck ,  Shuji Nakamura ,  Steven P. DenBaars

Inventor： Hisashi Masui ,  Hisashi Yamada ,  Kenji Iso ,  James S. Speck ,  Shuji Nakamura ,  Steven P. DenBaars

IPC: H01L33/00

CPC classification number: H01L33/34 ,  H01L33/16

Abstract: An increase in the Indium (In) content in light-emitting layers of light-emitting diode (LED) structures prepared on nonpolar III-nitride substrates result in higher polarization ratios for light emission than LED structures containing lesser In content. Polarization ratios should be higher than 0.7 at wavelengths longer than 470 nm.

Abstract translation: 在非极性III族氮化物衬底上制备的发光二极管（LED）结构的发光层中的铟（In）含量的增加导致与含有较少In含量的LED结构相比较高的发光极化比。 在470nm以上的波长下，极化率应高于0.7。

公开(公告)号：US20110253187A1

公开(公告)日：2011-10-20

申请号：US13089138

申请日：2011-04-18

Applicant: Hiroaki Ohta ,  Alexander Sztein ,  Steven P. DenBaars ,  Shuji Nakamura

Inventor： Hiroaki Ohta ,  Alexander Sztein ,  Steven P. DenBaars ,  Shuji Nakamura

IPC: H01L35/22

CPC classification number: H01L35/22

Abstract: A method to suppress thermal conductivities of nitride films by using stacking faults and/or nano-scale In-composition fluctuation(s). Therefore, the present invention reduces thermal conductivity of nitride while keeping electrical conductivity high. In addition, In composition fluctuations can enhance the Seebeck coefficient through thermionic emission. The present invention further discloses a nitride based (e.g. GaN) thermoelectric lateral device with a short length.

Abstract translation: 通过使用堆垛层错和/或纳米级组成波动来抑制氮化物膜的热导率的方法。 因此，本发明降低氮化物的导热性，同时保持导电性高。 此外，组成波动可以通过热电子发射增强塞贝克系数。 本发明还公开了一种具有短长度的氮化物基（例如GaN）热电横向装置。

公开(公告)号：US20110243172A1

公开(公告)日：2011-10-06

申请号：US13080260

申请日：2011-04-05

Applicant: You-Da Lin ,  Hiroaki Ohta ,  Shuji Nakamura ,  Steven P. DenBaars ,  James S. Speck

Inventor： You-Da Lin ,  Hiroaki Ohta ,  Shuji Nakamura ,  Steven P. DenBaars ,  James S. Speck

IPC: H01S5/343 ,  H01L33/06

CPC classification number: H01S5/34333 ,  B82Y20/00 ,  H01L33/06 ,  H01L33/16 ,  H01L33/32 ,  H01S5/3063 ,  H01S5/3202 ,  H01S5/3406 ,  H01S5/342 ,  H01S2304/04

Abstract: A semipolar plane III-nitride semiconductor-based laser diode or light emitting diode, comprising a semipolar Indium containing multiple quantum wells for emitting light, having Aluminum containing quantum well barriers, wherein the Indium containing multiple quantum well and Aluminum containing barriers are grown in a semipolar orientation on a semipolar plane.

Abstract translation: 一种半极性III族氮化物半导体激光二极管或发光二极管，其包含含有多个用于发光的量子阱的半极性铟，其具有含铝的量子阱屏障，其中含有多量子阱和含铝屏障的铟在 在半极性平面上的半极性取向。

公开(公告)号：US20110213916A1

公开(公告)日：2011-09-01

申请号：US13102281

申请日：2011-05-06

Applicant: Akira FUJIBAYASHI ,  Kazuhisa Fujimoto ,  Shuji Nakamura

Inventor： Akira FUJIBAYASHI ,  Kazuhisa Fujimoto ,  Shuji Nakamura

IPC: G06F12/00

CPC classification number: G06F3/0631 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/0625 ,  G06F3/0649 ,  G06F3/067 ,  G06F3/0685 ,  Y02D10/154

Abstract: A storage control apparatus according to the present invention includes a plurality of connecting units connected to one or more host computers and one or more hard disk drives as storage media for storing data, one or more non-volatile storage media which are of a different type from the hard disk drives and which store data WRITE requested from the host computer, a plurality of processing units for processing WRITE and READ requests from the host computer by using the hard disk drives or the non-volatile storage media and, a plurality of memory units for storing control information to be by the processing units.

Abstract translation: 根据本发明的存储控制装置包括连接到一个或多个主计算机和一个或多个硬盘驱动器的多个连接单元作为用于存储数据的存储介质，一个或多个不同类型的非易失性存储介质 从硬盘驱动器和从主计算机请求存储数据写入的多个处理单元，用于通过使用硬盘驱动器或非易失性存储介质来处理来自主计算机的写入和读取请求;以及多个存储器 用于存储处理单元所要控制信息的单元。