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121.发明申请公开(公告)号：US20220343846A1
公开(公告)日：2022-10-27
申请号：US17763818
申请日：2021-04-13
Inventor： Yongqian LI , Xuehuan FENG
IPC: G09G3/3233 , G11C19/28
Abstract: A pixel driving circuit includes: a data writing sub-circuit configured to write a data signal received at a data signal terminal into a first node under control of a first scanning signal received at a first scanning signal terminal; a driving sub-circuit configured to drive a light-emitting device coupled to a second node to work under control of a voltage of the first node and a first power supply voltage signal received at a first power supply voltage signal terminal; and a time control sub-circuit configured to transmit a control signal received at a control signal terminal to the first node under control of a second scanning signal received at a second scanning signal terminal after the light-emitting to device works for a preset time, so that the driving sub-circuit is turned off to control the light-emitting device to stop working.
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公开(公告)号：US20220278182A1
公开(公告)日：2022-09-01
申请号：US17680790
申请日：2022-02-25
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
Abstract: The present disclose is related to an array substrate. The array substrate may include a base substrate; a driving transistor on the base substrate; an insulating layer on the driving transistor, the insulating layer comprising a via hole above a first electrode of the driving transistor; a conductive portion on the insulating layer; and a light emitting device on the conductive portion and electrically connected to the conductive portion. The conductive portion may be electrically connected to the first electrode of the driving transistor through the via hole. The light emitting device may be above the via hole, and an orthographic projection of the light emitting device on the base substrate may cover an orthographic projection of the via hole on the base substrate.
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公开(公告)号：US20220262890A1
公开(公告)日：2022-08-18
申请号：US17626434
申请日：2021-02-09
Inventor： Leilei CHENG , Yongqian LI , Dacheng ZHANG
IPC: H01L27/32
Abstract: A display substrate includes: a base; a cathode power line disposed on the base and located in the peripheral region; a first insulating layer located on a side of a layer in which the cathode power line is located away from the base and having first via hole(s); a cathode layer located on the first insulating layer and electrically connected to the cathode power line through the first via hole(s); and spacer(s) located on a side of the cathode layer proximate to the base, a spacer covering at least a side wall of a first via hole, a thickness of a portion of the spacer covering the side wall decreasing along the side wall and in a direction pointing from an end of the side wall proximate to the base toward an end of the side wall of the first via hole away from the base.
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124.发明申请公开(公告)号：US20220223096A1
公开(公告)日：2022-07-14
申请号：US17424482
申请日：2020-09-28
Inventor： Xuehuan FENG , Yongqian LI
Abstract: A shift register circuit includes:an input sub-circuit connected to a first node, and configured to receive a first control signal, and cause a potential of the first node to jump from an initial potential to a first potential greater than the initial potential; an output sub-circuit connected to the first node, and configured to receive a first clock signal, generate an output signal, cause the potential of the first node to jump from the first potential to a third potential greater than the first potential; and a chamfering sub-circuit connected to the first node, and configured to receive a second control signal, cause the potential of the first node to gradually decrease from the third potential to a fourth potential greater than the initial potential and less than the third potential, and cause the potential of the first node to jump from the fourth potential to the initial potential.
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125.发明申请公开(公告)号：US20220108657A1
公开(公告)日：2022-04-07
申请号：US17261652
申请日：2020-04-07
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register circuit includes a first input sub-circuit, an output sub-circuit and an output control sub-circuit. The first input sub-circuit transmits a signal received at a second signal input terminal to a pull-up node. The output sub-circuit transmits a signal received at a first clock signal terminal to a shift signal output terminal, and transmits a signal received at an output signal transmission terminal to a first scan signal output terminal. The output control sub-circuit transmits a signal received at a chamfering signal terminal to the first scan signal output terminal in a predetermined time before the first scan signal output terminal stops outputting the signal from the output signal transmission terminal. The chamfering signal terminal transmits a signal with a voltage amplitude within a variation range of a voltage amplitude of a signal of the first scan signal output terminal.
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Patent Agency Ranking
公开(公告)号：US20220028340A9
公开(公告)日：2022-01-27
申请号：US16643280
申请日：2019-03-01
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3258 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device and a driving method. The shift register unit includes a blank input circuit, a blank pull-up circuit, a display input circuit, and an output circuit. The blank input circuit charges and holds the level of the pull-up control node, the blank pull-up circuit uses a first clock signal to charge a pull-up node, the display input circuit charges the pull-up node, and the output circuit outputs a plurality of output clock signals respectively to a plurality of output terminals. The plurality of output terminals include a shift signal output terminal and a plurality of pixel signal output terminals. The plurality of pixel signal output terminals are configured to respectively output a plurality of pixel signals to a plurality of rows of pixel units.
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公开(公告)号：US20210202679A1
公开(公告)日：2021-07-01
申请号：US16977928
申请日：2019-11-29
Inventor： Meng LI , Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Xuehuan FENG , Lang LIU , Dacheng ZHANG
IPC: H01L27/32 , H01L51/52 , H01L51/56 , G09G3/3233
Abstract: A display substrate and a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array. At least one sub-pixel includes a first transistor, a second transistor, a third transistor and a storage capacitor. The first electrode of the third transistor is electrically connected to an active layer of the third transistor through a first via hole, and the first electrode of the third transistor is configured to be electrically connected to the light emitting element through a second via hole; the first via hole and the second via hole are at least partially overlapped with each other in a direction perpendicular to the base substrate.
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公开(公告)号：US20210202605A1
公开(公告)日：2021-07-01
申请号：US16977512
申请日：2019-11-29
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Meng LI , Zhidong YUAN , Dacheng ZHANG , Lang LIU
IPC: H01L27/32
Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels which are arranged in a sub-pixel array in a first direction and a second direction. At least one sub-pixel includes a first transistor, a second transistor, a third transistor, and a storage capacitor. An active layer of the third transistor includes a body region and a first via hole region successively arranged in the first direction and electrically connected with each other; a first electrode of the third transistor is electrically connected to the first via hole region through a first via hole which is shifted in the second direction with respect to the body region, allowing the active layer incudes a first active layer side connecting the body region and the first via hole region; an extension direction of the first active layer side intersects with both the first direction and the second direction.
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129.发明申请公开(公告)号：US20210201752A1
公开(公告)日：2021-07-01
申请号：US16957426
申请日：2019-08-05
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: A shift register unit, a gate drive circuit, a display panel, a display device and a driving method. The shift register unit includes a first input circuit, a second input circuit, a first output circuit, a second output circuit, a first reset circuit and a second reset circuit. The first input circuit is configured to control a level of a first node in response to a first input signal. The second input circuit is configured to control the level of the first node in response to a second input signal. The first output circuit is configured to output a first clock signal to a first output terminal under a control of the level of the first node. The second output circuit is configured to output a second clock signal to a second output terminal under the control of the level of the first node.
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公开(公告)号：US20210193001A1
公开(公告)日：2021-06-24
申请号：US16072049
申请日：2018-01-08
Inventor： Xuehuan FENG , Xing ZHANG , Qi HU , Pan XU , Yongqian LI , Meng LI , Zhidong YUAN , Zhenfei CAI , Can YUAN
Abstract: The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.
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