Abstract:
A semiconductor memory device includes first and second bank groups and an internal column address generating circuit. Each of the first and second bank groups includes at least one bank. The internal column address generating circuit converts a column address into a first internal column address and outputs the first internal column address through a first transmission line in response to a bank address if a read operation or a write operation is performed on a bank of the first bank group. Also, the internal column address generating circuit converts the column address into a second internal column address and outputs the second internal column address through a second transmission line in response to the bank address if a read operation or a write operation is performed on a bank of the second bank group.
Abstract:
Disclosed is a lens driving apparatus. The lens driving apparatus includes a base formed at a center thereof with a first opening; a housing coupled with the base and having a second opening corresponding to the first opening; a yoke installed on the base and including a horizontal plate having a third opening corresponding to the first opening and a vertical plate protruding upward from the horizontal plate; a bobbin movably installed in the yoke and coupled with a lens module; a coil fixedly disposed around the bobbin; a plurality of magnets provided at the vertical plate of the yoke to face the coil; and a spring installed on at least one of upper and lower portions of the yoke to return the bobbin, which has moved up due to interaction between the magnet and the coil, to its initial position.
Abstract:
Disclosed is a motor for driving lenses. The motor includes a case, a yoke fixed in the case, a magnet fixed in the yoke, a carrier equipped with lenses and installed in the magnet such that the carrier moves up and down within the magnet, a coil coupled with the carrier, a spring unit including first and second springs having arc shapes and being separated from each other while forming a ring shape as a whole, a spacer supporting an outer peripheral surface of the spring unit, and a terminal provided on the spacer, in which one side of the terminal protrudes downward by passing through a bottom of the case to make connection with the spring unit and a main PCB of a product.
Abstract:
A display apparatus and a control method thereof are disclosed. The display apparatus includes: a display unit; a receiving unit which receives a preset input command; and a control unit which displays an image including a plurality of objects corresponding respectively to preset operations and a selection zone for selection of the objects, moves the selection zone in response to a 4-way up, down, left and right way movement input received by the receiving unit, and displays on the display unit a selection menu which is reconfigured such that at least one of the objects included in the selection zone can be selected according to the 4-way movement input. The control method includes: displaying an image including a plurality of objects corresponding respectively to preset operations and a selection zone for selection of the object; moving the selection zone in response to a 4-way up, down, left and right way movement input; and displaying a selection menu reconfigured such that at least one of the objects included in the selection zone can be selected according to the 4-way movement input.
Abstract:
A display apparatus and a control method thereof are provided. The display apparatus includes: a display unit which displays an image; a user input unit which receives a user input; and a controller which controls the display unit to display a plurality of first icons corresponding to a plurality of content items selected by the user input and at least one function which commonly corresponds to the plurality of content items, and performs the function selected by a user input.
Abstract:
A semiconductor device reduces unnecessary operating current while an internal row/column address is generated. The semiconductor memory device includes an address input unit for transferring an address signal input from an external device; an internal column address generating unit for receiving the transferred address signal to generate an internal column address; an internal row address generating unit for receiving the transferred address signal to generate an internal row address; and an internal address control unit for controlling the internal row address generating unit in response to an activated states of banks in the semiconductor memory device.
Abstract:
A semiconductor memory device has a data masking function during a write operation. The semiconductor memory device includes a data mask input unit that receives a data mask signal. A data input unit receives data and delays the output of the data more than the output of the data mask signal. A write driver selectively drives the data outputted from the data input unit according to the data mask signal outputted from the data mask input unit. The semiconductor memory device ensures that the data mask signal is inputted into the write driver prior to the input of the data, thus preventing a timing mismatch between data and the data masking signal and poor data masking.
Abstract:
A semiconductor memory device overdriving for a predetermined period when sense amplifying a bitline. An overdriving control unit generates an overdriver enabling signal having an enabling period including a point to enable a bitline sense amplifier and a point to select a column. An overdriver provides an overdrive voltage of a level higher than that of a normal pull-up drive voltage to a pull-up node of the bitline sense amplifier in response to the overdriver enabling signal. The data line pair provides a sufficient difference in potential even for a tRCD_min condition by preventing a drop in the potential of the bitline using the overdrive operation when selecting a column.
Abstract:
A semiconductor memory device includes an aligning signal generator, a data aligning unit, a data transmitting controller and a data transmitter. The aligning signal generator receives a data strobe signal to output aligning signals. The data aligning unit aligns a plurality of data pieces input in succession in response to the aligning signals. The data transmitting controller generates a data transmitting signal synchronized with the transition of the aligning signal. The data transmitter transmits an aligned data output from the data aligning unit to a data storage area in response to the data transmitting signal. A method for driving the semiconductor memory device includes aligning data pieces input in succession as parallel data in response to a data strobe signal, generating a data transmitting signal corresponding to transition of the data strobe signal and transmitting the parallel data to a data storage area in response to the data transmitting signal.
Abstract:
A layout method for a mask can include forming a main pattern on a substrate; and forming a plurality of dummy patterns, each having a same size as another, in regions other than the region in which the main pattern is formed. According to an embodiment, the forming of the plurality of dummy patterns includes forming a plurality of mother dummy patterns separated from each other by a second spacing on the substrate; forming a plurality of child dummy patterns by dividing the plurality of mother dummy patterns into child dummy patterns; and removing the child dummy patterns interacting with the main pattern.