公开(公告)号：US6040054A

公开(公告)日：2000-03-21

申请号：US791077

申请日：1997-01-29

申请人： Hisao Odashima ,  Tomomi Takahashi ,  Toshiyuki Shimizu

发明人： Hisao Odashima ,  Tomomi Takahashi ,  Toshiyuki Shimizu

IPC分类号： C23C22/07 ,  B05D7/00 ,  C09D5/08 ,  C23C22/74 ,  C23C28/00 ,  B32B15/08 ,  B32B27/08 ,  B32B27/18 ,  B32B27/30

CPC分类号： B05D7/51 ,  C09D5/08 ,  C23C22/74 ,  C23C28/00

摘要： A chromium-free composition for treating metal surface comprising (a) a hydroxyl group-containing organic resin, (b) a phosphoric acid and (c) at least one of ions and compounds of at least one metal selected from the group consisting of Cu, Co, Fe, Mn, Sn, V, Mg, Ba, Al, Ca, Sr, Nb, Y and Zn, and (d) at least one of colloids (sol) or powders of SiO.sub.2, SnO.sub.2, Fe.sub.2 O.sub.3, Fe.sub.3 O.sub.4, MgO, ZrO.sub.2, Al.sub.2 O.sub.3 and Sb.sub.2 O.sub.5 ; as well as a metal sheet or metal article having thereon (i) a coating film of the chromium-free composition and optionally (ii) a coating film of a coating composition comprising an organic resin and if desired a colloid (sol) or a powder.

摘要翻译： 一种用于处理金属表面的无铬组合物，其包含（a）含羟基的有机树脂，（b）磷酸和（c）至少一种离子和选自Cu中的至少一种金属的化合物 ，Co，Fe，Mn，Sn，V，Mg，Ba，Al，Ca，Sr，Nb，Y和Zn中的至少一种，（d）SiO 2，SnO 2，Fe 2 O 3，Fe 3 O 4， MgO，ZrO2，Al2O3和Sb2O5; 以及金属片或金属制品，其上具有（i）无铬组合物的涂膜和任选地（ii）包含有机树脂的涂料组合物的涂膜，并且如果需要，胶体（溶胶）或粉末 。

公开(公告)号：US5935204A

公开(公告)日：1999-08-10

申请号：US852026

申请日：1997-05-06

申请人： Toshiyuki Shimizu ,  Hiroaki Ishihata

发明人： Toshiyuki Shimizu ,  Hiroaki Ishihata

IPC分类号： G06F12/08 ,  G06F15/16 ,  G06F15/173 ,  G06F13/14

CPC分类号： G06F12/0813 ,  G06F12/0804 ,  G06F15/173

摘要： Data transmission control apparatus which controls data transmission between processing systems via a transmission line, each processing system including a memory system consisting of a main memory and a cache memory. The apparatus addresses data in the main memory by a memory address and gives an instruction to transmit the addressed data; determines whether or not the addressed data is in the cache memory; provides a match signal when the data is in the cache memory; reads the addressed data from the cache memory when instructed by the instruction and when a ready signal and the match signal are provided, and, otherwise reads the addressed data from the main memory; writes the data read into a port; transmits the data written in the port to the another processing system connected to the transmission line; and provides the ready signal when the port is ready to receive additional data.

摘要翻译： 数据传输控制装置，其通过传输线控制处理系统之间的数据传输，每个处理系统包括由主存储器和高速缓冲存储器组成的存储器系统。 该装置通过存储器地址对主存储器中的数据进行寻址，并给出发送寻址数据的指令; 确定所寻址的数据是否在高速缓冲存储器中; 当数据在高速缓冲存储器中时提供匹配信号; 当指令指示时，当提供就绪信号和匹配信号时，从高速缓冲存储器读取寻址数据，否则从主存储器读取寻址数据; 将读取的数据写入端口; 将写入端口的数据发送到连接到传输线的另一处理系统; 并在端口准备好接收附加数据时提供就绪信号。

公开(公告)号：US5905911A

公开(公告)日：1999-05-18

申请号：US927207

申请日：1997-09-11

申请人： Toshiyuki Shimizu

发明人： Toshiyuki Shimizu

IPC分类号： G06F13/28 ,  G06F13/38 ,  G06F13/00

CPC分类号： G06F13/28

摘要： A data transfer system which improves efficiency in direct data transfer from an input device with a first-in first-out (FIFO) memory serving as a buffer to a memory and from a memory to an output device with a first-in first-out (FIFO) memory serving as a buffer. The data is transferred from the input device to the memory and from the memory to the output device by meeting the requirement of address alignment without restricting data transfer to fixed multiples of, for example, four words. A memory write controller is informed as to how much data is present in the buffer in the input device. The controller checks memory address alignment to determine the transfer size of data from the input device to the memory. A memory read controller is also informed as to how much free space is present in the buffer in the output device and checks the memory address alignment to determine the transfer size of data from the memory to the output device. The request lines from the input device are used to indicate that data in the FIFO is either one word or more, two words or more or four words or more. A maximum data transfer size is determined automatically from an amount of data stored in the buffer of the input device and a check on memory address alignment.

摘要翻译： 一种数据传输系统，其提高从具有用作缓冲器的先入先出（FIFO）存储器的输入设备到存储器以及从存储器到输出设备的直接数据传输的效率，其具有先进先出 （FIFO）存储器作为缓冲器。 通过满足地址对齐的要求，将数据从输入设备传送到存储器，并从存储器传输到输出设备，而不会将数据传输限制为例如四个字的固定倍数。 通知存储器写入控制器在输入设备中的缓冲器中存在多少数据。 控制器检查存储器地址对齐以确定从输入设备到存储器的数据传输大小。 还通知存储器读取控制器，用于在输出设备中的缓冲器中存在多少可用空间，并检查存储器地址对齐以确定从存储器到输出设备的数据传送大小。 来自输入设备的请求线用于指示FIFO中的数据是一个字以上，两个字以上或四个字以上。 从存储在输入设备的缓冲器中的数据量和存储器地址对齐检查自动确定最大数据传输大小。

公开(公告)号：US5892979A

公开(公告)日：1999-04-06

申请号：US967219

申请日：1997-10-29

申请人： Osamu Shiraki ,  Yoichi Koyanagi ,  Takeshi Horie ,  Toshiyuki Shimizu ,  Hiroaki Ishihata

发明人： Osamu Shiraki ,  Yoichi Koyanagi ,  Takeshi Horie ,  Toshiyuki Shimizu ,  Hiroaki Ishihata

IPC分类号： G11C7/00 ,  G06F5/06 ,  G06F13/00

CPC分类号： G06F5/06

摘要： An overflow control unit stores, in a FIFO buffer, data generated by a processor. The overflow control unit sets a predetermined flag, upon detecting that a FIFO buffer is full or nearly full. The overflow control unit stores, in a saving buffer, data sent from the processor, while the flag is set. Thereafter, the overflow control unit notifies the processor, by an interrupt, of an effect that an available capacity of the FIFO buffer rises above a predetermined threshold.Upon receiving an interrupt, the processor transfers to the FIFO buffer data saved in the saving buffer. Upon a completion of transferring to the FIFO buffer all data saved in the saving buffer, the processor resets the flag. This allows the overflow control unit to again store in the FIFO buffer, data sent from the processor. The overflow control unit also monitors the volume of data stored in the saving buffer, and notifies the processor, by an interrupt, of an effect that the saving buffer is full. Upon receiving an interrupt, the processor expands an available capacity of the saving buffer.

摘要翻译： 溢出控制单元在FIFO缓冲器中存储由处理器生成的数据。 检测到FIFO缓冲器已满或接近满时，溢出控制单元设置预定标志。 在保存缓冲器中，溢出控制单元在设置标志时存储从处理器发送的数据。 此后，溢出控制单元通过中断通知处理器FIFO缓冲器的可用容量上升到预定阈值以上的效果。 在接收到中断时，处理器将传输到保存在保存缓冲区中的FIFO缓冲区数据。 在完成向FIFO缓冲区传送保存在保存缓冲区中的所有数据后，处理器重置标志。 这允许溢出控制单元再次存储在FIFO缓冲器中，从处理器发送的数据。 溢出控制单元还监视存储在保存缓冲器中的数据量，并通过中断向处理器通知保存缓冲器已满的效果。 在接收到中断时，处理器扩展了保存缓冲区的可用容量。

公开(公告)号：US5890217A

公开(公告)日：1999-03-30

申请号：US598243

申请日：1996-02-07

申请人： Akira Kabemoto ,  Naohiro Shibata ,  Toshiyuki Muta ,  Takayuki Shimamura ,  Hirohide Sugahara ,  Junji Nishioka ,  Takatsugu Sasaki ,  Satoshi Shinohara ,  Yozo Nakayama ,  Jun Sakurai ,  Hiroaki Ishihata ,  Takeshi Horie ,  Toshiyuki Shimizu

发明人： Akira Kabemoto ,  Naohiro Shibata ,  Toshiyuki Muta ,  Takayuki Shimamura ,  Hirohide Sugahara ,  Junji Nishioka ,  Takatsugu Sasaki ,  Satoshi Shinohara ,  Yozo Nakayama ,  Jun Sakurai ,  Hiroaki Ishihata ,  Takeshi Horie ,  Toshiyuki Shimizu

IPC分类号： G06F12/08 ,  G06F15/17 ,  G06F13/00

CPC分类号： G06F12/0817 ,  G06F12/0831 ,  G06F2212/2542

摘要： A plurality of processors, each with caches provided for a plurality of processor modules and a local storage in which a main storage is distributed and arranged are mutually connected through an internal snoop bus. The processor modules are mutually connected through a second system bus. By using two separate buses, cache coherence operations within a processor group is kept separate from cache coherence operations outside the processor group.

摘要翻译： 多个处理器，每个处理器具有为多个处理器模块提供的高速缓存和其中分配和布置主存储器的本地存储器通过内部监听总线相互连接。 处理器模块通过第二系统总线相互连接。 通过使用两个单独的总线，处理器组内的高速缓存一致性操作与处理器组之外的高速缓存一致性操作保持分开。

公开(公告)号：US4862398A

公开(公告)日：1989-08-29

申请号：US119966

申请日：1987-11-13

申请人： Toshiyuki Shimizu ,  Osamu Shimizu ,  Kenji Tenmoku ,  Kunihiko Mitoh ,  Yasuhiro Honoki

发明人： Toshiyuki Shimizu ,  Osamu Shimizu ,  Kenji Tenmoku ,  Kunihiko Mitoh ,  Yasuhiro Honoki

IPC分类号： G01C17/38

CPC分类号： G01C17/38

摘要： In a location detecting apparatus which detects the location of a moving body on the basis of the heading signal from a terrestrial magnetism heading sensor attached to the moving body and the rotational angle signal from a rotational angle sensor attached to the moving body, a correcting method for correcting errors in a terrestrial magnetism heading sensor, comprising the steps of: detecting the amount of a heading change of the moving body that is made when the moving body turns a curve, and detecting a magnetized amount of the moving body on the basis of the detected amount of a heading change, an output from the terrestrial magnetism heading sensor before the heading change is made and an output from the terrestrial magnetism heading sensor after the heading change is made.

摘要翻译： 在根据来自安装在移动体上的地磁导向传感器的航向信号和来自安装在移动体上的旋转角度传感器的旋转角度信号的基础上检测移动体的位置的位置检测装置中， 用于校正地磁行进传感器中的误差，包括以下步骤：检测当所述移动体转弯时制成的所述移动体的行进变化量，并基于所述移动体的磁化量来检测所述移动体的磁化量 进行标题改变的检测量，在进行航向改变之前来自地面磁性航向传感器的输出，以及在航向改变之后来自地面磁性航向传感器的输出。