公开(公告)号：US4706167A

公开(公告)日：1987-11-10

申请号：US809767

申请日：1985-12-17

Applicant: Donald F. Sullivan

Inventor： Donald F. Sullivan

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/24 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K1/0268 ,  H05K1/0266 ,  H05K3/242 ,  H05K3/3452 ,  H05K3/465 ,  H05K1/117 ,  H05K2201/09036 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/09845 ,  H05K2201/09927 ,  H05K2201/09936 ,  H05K2201/09981 ,  H05K2203/025 ,  H05K2203/054 ,  H05K2203/056 ,  H05K2203/0571 ,  H05K2203/0577 ,  H05K2203/066 ,  H05K2203/0759 ,  H05K3/0023 ,  H05K3/045 ,  H05K3/108 ,  H05K3/4661 ,  Y10T29/49156

Abstract: In the manufacturing process for a printed wiring board a photopolymer insulation layer having a flat outer plateau surface is extended from the board substrate surface carrying the wiring pattern and provides access channels to a plurality of wiring pattern conductor pad areas. A patterned conductor layer disposed on the insulation layer surface including the sidewalls of the access channels thus electrically connects to the conductor pad areas. Circuit wiring pattern test current or plating currents are passed through the conductor layer pattern during the manufacturing process, and the conductor layer may thereafter be easily removed from the flat surface by sanding or the like. Permanently retained conductor layer portions, such as feasible by indenting the plateau surface, aid in expanding conductor surface areas at solder joint pads, or in increasing the density of circuit wires feasible in a given substrate board area. The conductor layer may provide indicia marking nomenclature patterns which are in dot matrix format to reduce capacitance coupling between wiring circuits on the board substrate.

Abstract translation: 在印刷电路板的制造方法中，具有平坦的外平台表面的光聚合物绝缘层从承载布线图案的基板表面延伸，并且提供到多个布线图案导体焊盘区域的访问通道。 设置在包括进入通道的侧壁的绝缘层表面上的图案化导体层因此电连接到导体焊盘区域。 电路布线图案测试电流或电镀电流在制造过程中通过导体层图案，并且导体层此后可以通过砂磨等容易地从平坦表面移除。 永久保持的导体层部分，例如通过压平平台表面可行，有助于扩大焊点处的导体表面积，或者增加在给定的基板区域中可行的电路线的密度。 导体层可以提供点阵格式的标记标记图案，以减小电路板基板上布线电路之间的电容耦合。

公开(公告)号：US4645733A

公开(公告)日：1987-02-24

申请号：US720354

申请日：1985-04-05

Applicant: Donald F. Sullivan

Inventor： Donald F. Sullivan

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/24 ,  H05K3/34 ,  H05K3/46 ,  G03C5/00

CPC classification number: H05K3/3452 ,  H05K3/107 ,  H05K3/242 ,  H05K1/117 ,  H05K2201/09036 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/09845 ,  H05K2201/09927 ,  H05K2201/09936 ,  H05K2201/09981 ,  H05K2203/025 ,  H05K2203/054 ,  H05K2203/056 ,  H05K2203/0571 ,  H05K2203/0577 ,  H05K2203/066 ,  H05K2203/0759 ,  H05K3/0023 ,  H05K3/045 ,  H05K3/108 ,  H05K3/4661

Abstract: High resolution, high packing density printed circuit wiring with high conductivity wiring is achieved by putting down thick (0.006 in., 0.015 cm) liquid photopolymer insulator layers on an inexpensive substrate and photodeveloping conductor pattern indentations in the layer for filling with conductive materials. Thus, 0.003 in. (0.008 cm) line to line spacings can be achieved with high conductivity conductors 0.006 in. (0.015 cm) thick. A flush top layer of polymer is readily cleaned of contaminants by light surface sanding to assure designed insulation spacings of polymer between conductors without interfering smears. The finished circuits are not subject to damage in handling from surface scratches since the conductors are indented.

Abstract translation: 通过在廉价的基板上放下厚（0.006英寸，0.015厘米）的液体光聚合物绝缘体层和用于填充导电材料的层中的光致发展导体图案凹陷来实现具有高导电性布线的高分辨率，高封装密度的印刷电路布线。 因此，使用0.006英寸（0.015cm）厚的高导电性导体可以实现线间距为0.003英寸（0.008cm）的线间距。 聚合物的顶部顶层易于通过光表面打磨清除污染物，以确保导体之间聚合物的设计绝缘间隔，而不会产生干扰。 由于导体缩进，所以完成的电路不会因表面划痕而受到损坏。

公开(公告)号：US4528259A

公开(公告)日：1985-07-09

申请号：US550379

申请日：1983-11-10

Applicant: Donald F. Sullivan

Inventor： Donald F. Sullivan

IPC: G03F7/00 ,  G03F7/16 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/24 ,  H05K3/28 ,  H05K3/34 ,  H05K3/42 ,  H05K3/46 ,  G03C5/00 ,  G03F7/26

CPC classification number: H05K3/3452 ,  G03F7/00 ,  G03F7/16 ,  H05K1/116 ,  H05K3/0082 ,  H05K3/242 ,  H05K3/28 ,  H05K3/428 ,  H05K1/0266 ,  H05K1/0268 ,  H05K1/095 ,  H05K1/117 ,  H05K2201/09036 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/09845 ,  H05K2201/09927 ,  H05K2201/09936 ,  H05K2201/09981 ,  H05K2203/025 ,  H05K2203/054 ,  H05K2203/056 ,  H05K2203/0571 ,  H05K2203/0577 ,  H05K2203/066 ,  H05K2203/0759 ,  H05K3/0023 ,  H05K3/045 ,  H05K3/108 ,  H05K3/243 ,  H05K3/4644 ,  H05K3/4661

Abstract: In a printed wiring board of the type that places a solder mask over bare copper circuit traces, the solder mask is laid down with a flat planar surface by means of a liquid photopolymer solder mask layer deposited, photoexposed and developed to uncover those circuit trace positions such as through holes and connector pads for further processing. Then a very thin copper layer is chemically deposited over the surface area and a resist layer is laid down as a cover insulating layer on the flat surface so that a thicker layer of copper may be electrolytically plated over the uncovered circuit traces. In this manner the conductive area about each of the connector pads is significantly increased by plating on the sidewalls of the solder mask layer which surround the connector pads. Additionally the photopolymer flat surface is glossy and does not strongly adhere to the deposited thin copper layer as does the sidewall and conductor pad areas, thereby permitting the cover insulating layer and the thin copper layer to be readily removed from the flat planar surface by mechanical methods.

Abstract translation: 在将焊料掩模放置在裸铜电路迹线上的类型的印刷电路板中，通过沉积，光曝光和显影的液体光聚合物焊接掩模层，将焊接掩模放置成具有平坦的平坦表面，以露出那些电路迹线位置 例如通孔和连接器垫用于进一步处理。 然后在表面区域上化学沉积非常薄的铜层，并且将抗蚀剂层铺设在平坦表面上作为覆盖绝缘层，使得较厚的铜层可以在未覆盖的电路迹线上电解电镀。 以这种方式，通过电镀在围绕连接器焊盘的焊料掩模层的侧壁上，围绕每个连接器焊盘的导电区域显着增加。 此外，光聚合物平坦表面是光滑的，并且不像侧壁和导体焊盘区域那样牢固地附着到沉积的薄铜层上，从而允许覆盖绝缘层和薄铜层通过机械方法容易地从平坦平面移除 。