Abstract:
An image sensor includes a plurality of pixels with each pixel having a photosensitive area that captures a sequence of at least two light exposures by accumulating photon-induced charge for each exposure; at least two charge storage areas each of which is associated respectively with one of the sequence of light exposures into which the accumulated charge for each exposure is transferred sequentially; and at least one amplifier that is associated with at least one of the charge storage areas.
Abstract:
The present invention relates to a CMOS image sensor having a wide dynamic range, which permits favorable imaging even in cases where a bright portion and a dark portion exist simultaneously. The dynamic range can be widened by preventing the saturation of optical charge at a high illuminance by removing low illuminance signals due to long-time accumulation, intermediate illuminance signals due to short-time accumulation, and high illuminance signals due to ultra-short time accumulation from pixel portions of the image sensor. Further, adaptive control of the dynamic range can also be performed by dynamically changing the wide dynamic range imaging conditions that comprise a combination of different accumulation times of each of a plurality of short time accumulation signals.
Abstract:
Wide dynamic range operation is used to write a signal in a freeze-frame pixel into the memory twice, first after short integration and then after long integration. The wide dynamic range operation allows the intra-scene dynamic range of images to be extended by combining the image taken with a short exposure time with the image taken with a long exposure time. A freeze-frame pixel is based on voltage sharing between the photodetector PD and the analog memory. Thus, with wide dynamic range operation, the resulting voltage in the memory may be a linear superposition of the two signals representing a bright and a dark image after two operations of sampling.
Abstract:
The solid state image pickup device includes a pixel, the pixel including: a photoelectric conversion region for generating carrier by photoelectric conversion and accumulating the carrier; a carrier holding region for accumulating carrier flowing out from the photoelectric conversion region during the photoelectric conversion region generates and accumulates carrier; a source follower amplifier SF-MOS for amplifying carrier; a transfer MOS transistor Tx-MOS for transferring the carrier accumulated in the photoelectric conversion region to the source follower amplifier SF-MOS; and a transfer MOS transistor Ty-MOS for transferring the carrier accumulated in the carrier holding region to the source follower amplifier SF-MOS. The carrier holding region is formed so as to have a trench structure.
Abstract:
Apparatus for storing an optical image of an object comprises an imaging device having a multiplicity of pixels, each pixel including a light sensor and a multiplicity of storage cells coupled to the sensor. A lens system focuses light from the object onto the imaging device. Within each pixel a first one of its storage cells is configured to store data corresponding to a first exposure of its sensor to light from the object, and a second one of its storage cells is configured to store data corresponding to a second exposure of its sensor to light from the object. In a preferred embodiment, the pixels are arranged in an array extending along a first direction, and during the time interval between the first and second exposures, a translator is configured to produce, in a second direction, a relative translation or shift between the imaging device and the focal point of the lens system. In one embodiment, the second direction is traverse to the first direction. In a preferred embodiment, each pixel comprises a photosensitive region, and the pixels are shifted by a distance that is approximately equal to one half the pitch of the photosensitive regions as measured in the second direction. In this fashion, the invention increases the spatial resolution by increasing the effective number of pixels of the sensor without increasing the actual number of pixels. In alternative embodiment of the invention, the dynamic range of the sensor is enhanced.
Abstract:
A solid-state image sensing device includes a pixel unit, analog-to-digital converter, controller, and adder. In the pixel unit, cells are two-dimensionally arranged on a semiconductor substrate. An output analog signal from the pixel unit is converted into a digital signal by the analog-to-digital converter and output. The controller controls the pixel unit and analog-to-digital converter, and causes the analog-to-digital converter to digitize a plurality of analog signals different in storage time in the pixel unit during the storage period of the electric charge of one frame. The adder adds digital signals corresponding to the analog signals different in storage time and output from the analog-to-digital converter.
Abstract:
Wide dynamic range operation is used to write a signal in a freeze-frame pixel into the memory twice, first after short integration and then after long integration. The wide dynamic range operation allows the intra-scene dynamic range of images to be extended by combining the image taken with a short exposure time with the image taken with a long exposure time. A freeze-frame pixel is based on voltage sharing between the photodetector PD and the analog memory. Thus, with wide dynamic range operation, the resulting voltage in the memory may be a linear superposition of the two signals representing a bright and a dark image after two operations of sampling.
Abstract:
An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column. The control circuit controls each of the unit cells, causing the charge-limiting device to limit the charge generated by the light-receiving device during a first period and transferred to the charge-accumulating section through the transfer device. The charge generated by the light-receiving device during a second period following the first period and transferred to the charge-accumulating section through the transfer device is added to the electric charge accumulated in the charge-accumulating section.
Abstract:
A solid-state image sensor includes a photocell array for accumulating signal charge for each pixel in accordance with progress of exposure, and a read circuit for reading out information on the accumulated signal charge from the photocell array. With an insulating structure between its input and output, an amplifier in the read circuit generates an output signal without resetting the accumulated charge in the photocell. Information on the accumulated charge is read out at different exposure times while signal charge is accumulated during exposure, and a plurality of image signals can sequentially be obtained without destroying the information.
Abstract:
A unit cell (20) is disclosed that has an input node for coupling to an output of a detector (D1) of electromagnetic radiation, such as IR or visible radiation. The unit cell includes a first capacitor (CintA) switchably coupled to the input node for receiving a charge signal from the detector, and for integrating the charge signal during a first integration period, as well as a second capacitor (CintB)switchably coupled to the input node for integrating the charge signal during a second integration period. The unit cell further includes an output multiplexer (32, 34) for selectively coupling the first capacitor and the second capacitor to an output signal line (38) during respective charge signal readout periods. In the preferred embodiment a duration of the first integration period is one of greater than or less than the second integration period, and the first integration period is one of non-overlapping or overlapping with the second integration period, and vice versa. The first integration period can be interleaved with the second integration period, or vice versa.