公开(公告)号：US20210091077A1

公开(公告)日：2021-03-25

申请号：US16777831

申请日：2020-01-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Yi Lee ,  Cheng-Lung Hung ,  Weng Chang ,  Chi-On Chui

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8234

Abstract: A semiconductor device may include a substrate, a first transistor disposed on the substrate, and a second transistor disposed on the substrate. The first gate structure of the first transistor may include a first high-k layer, a first capping layer and a first work function layer sequentially disposed on the substrate, wherein a material of the first work function layer includes Ta. The second transistor includes a second gate structure. The second gate structure includes a second high-k layer, a second capping layer and a second work function layer sequentially disposed on the substrate, wherein the first capping layer and the second capping layer are formed of the same layer, and a material of the second work function layer is different from the material of the first work function layer.

公开(公告)号：US20200083115A1

公开(公告)日：2020-03-12

申请号：US16686365

申请日：2019-11-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kun-Yu Lee ,  Huicheng Chang ,  Che-Hao Chang ,  Ching-Hwanq Su ,  Weng Chang ,  Xiong-Fei Yu

IPC: H01L21/8238 ,  H01L27/092

Abstract: Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.