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公开(公告)号：US20210225994A1
公开(公告)日：2021-07-22
申请号：US17256106
申请日：2019-08-01
Inventor： Yue Long , Weiyun Huang , Chao Zeng , Yao Huang , Meng Li
Abstract: Provided is a display substrate including a base substrate, a plurality of pixel units, at least one first power line, a blocking structure, an auxiliary connection structure, a cathode layer and a first organic pattern. A first projection region formed from an orthographic projection of the auxiliary connection structure on the base substrate and an orthographic projection of the blocking structure on the base substrate do not overlap.
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公开(公告)号：US20210225992A1
公开(公告)日：2021-07-22
申请号：US17255888
申请日：2019-08-01
Inventor： Yue Long , Weiyun Huang , Chao Zeng , Meng Li , Yao Huang
Abstract: A display substrate including a base substrate, a plurality of pixel units, at least one first power line, a blocking structure, an auxiliary connection structure, a cathode layer, and a first organic pattern. A distance between a first connection position closer to a first portion of the at least one first power line and the blocking structure is arranged to be larger.
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公开(公告)号：US11056057B2
公开(公告)日：2021-07-06
申请号：US16639116
申请日：2019-09-27
Inventor： Meng Li
IPC: G09G3/3291 , G09G3/3258 , G09G3/3266 , H01L27/32
Abstract: An array substrate is provided. The array substrate includes a plurality of pixel groups, a respective one of the plurality of pixel groups including two adjacent pixels in a same row of pixels, a respective one of the two adjacent pixels including three subpixels; a plurality of scanning line groups configured to respectively control a plurality of rows of pixels, a respective one group of the plurality of scanning line groups including four scanning lines; and a plurality of data line groups respectively connected to a plurality of columns of pixel groups of the plurality of pixel groups, a respective one group of the plurality of data line groups including three data lines. The two adjacent pixels includes a first pixel and a second pixel. Each of the first pixel and the second pixel includes a first subpixel, a second subpixel, and a third subpixel.
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公开(公告)号：US11031437B2
公开(公告)日：2021-06-08
申请号：US16335972
申请日：2018-06-22
Inventor： Zhidong Yuan , Pan Xu , Can Yuan , Meng Li
Abstract: A display substrate and a fabrication method thereof, a display panel and a display device are provided. The display substrate includes pixels. Each of the pixels includes sub-pixels that emit light of different colors, each of the sub-pixels includes a light emitting element, and at least one of the sub-pixels further includes a color filter. The color filter of the at least one of the sub-pixels covers a portion of a light emitting region of the light emitting element of the at least one of the sub-pixels, and a color of the color filter of the at least one of the sub-pixels is the same as a color of light emitted by the light emitting element of the at least one of the sub-pixels.
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公开(公告)号：US10902932B2
公开(公告)日：2021-01-26
申请号：US16398706
申请日：2019-04-30
Inventor： Xuehuan Feng , Yongqian Li , Meng Li
Abstract: A gate drive circuit, a method of driving a gate drive circuit, a display device, and a method of manufacturing an array substrate are provided. The gate drive circuit includes a repair signal line, a plurality of output signal lines, and a plurality of shift register units that are cascaded. The repair signal line is configured to transmit the repair signal to the first output signal line. The plurality of shift register units include a first shift register unit and a plurality of second shift register units, and the plurality of second shift register units are correspondingly connected to the second output signal lines. The first output signal line corresponds to but is in a state of being disconnected to the first shift register unit, and the first output signal line and the plurality of second output signal lines are configured to output a set of shift pulse signals.
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Patent Agency Ranking
公开(公告)号：US10593279B2
公开(公告)日：2020-03-17
申请号：US15821149
申请日：2017-11-22
Inventor： Meng Li , Yongqian Li , Pan Xu , Zhenfei Cai , Zhidong Yuan , Can Yuan , Xuehuan Feng , Wenchao Bao
Abstract: A display device, a gate driving circuit and a gate driving unit are provided. The gate driving unit includes: a signal maintenance circuit configured to, in the case that a first clock signal at a high level is received, output a high level in accordance with an inputted trigger signal at a high level; a first-level output circuit configured to, in the case that a second clock signal at a high level is received, output a first-level driving signal at a high level in accordance with the high level from an output end of the signal maintenance circuit; and a second-level output circuit configured to, in the case that a third clock signal at a high level is received, output a second-level driving signal at a high level in accordance with the high level from an output end of the first-level output circuit.
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公开(公告)号：US20200027930A1
公开(公告)日：2020-01-23
申请号：US16335972
申请日：2018-06-22
Inventor： Zhidong Yuan , Pan Xu , Can Yuan , Meng Li
Abstract: A display substrate and a fabrication method thereof, a display panel and a display device are provided. The display substrate includes pixels. Each of the pixels includes sub-pixels that emit light of different colors, each of the sub-pixels includes a light emitting element, and at least one of the sub-pixels further includes a color filter. The color filter of the at least one of the sub-pixels covers a portion of a light emitting region of the light emitting element of the at least one of the sub-pixels, and a color of the color filter of the at least one of the sub-pixels is the same as a color of light emitted by the light emitting element of the at least one of the sub-pixels.
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公开(公告)号：US20190164476A1
公开(公告)日：2019-05-30
申请号：US15981020
申请日：2018-05-16
Inventor： Xuehuan Feng , Zhidong Yuan , Zhenfei Cai , Meng Li , Can Yuan
IPC: G09G3/3225 , H01L27/32 , H01L51/05
Abstract: The present disclosure discloses a pixel circuit, a display apparatus and a dual-gate driving transistor. The pixel circuit comprises a dual-gate driving transistor having a drain electrically connected to a first power supply terminal; a threshold voltage compensation unit electrically connected to a data terminal, a first control terminal, a first gate of the dual-gate driving transistor, and a source of the dual-gate driving transistor respectively; a mobility compensation unit electrically connected to a sensing signal terminal, a second control terminal, and the source of the dual-gate driving transistor respectively; and a light emitting control unit electrically connected to the data terminal, a third control terminal, a second gate of the dual-gate driving transistor, the source of the dual-gate driving transistor, and a light emitting device respectively. The threshold voltage compensation unit and the mobility compensation unit perform threshold voltage compensation for the dual-gate driving transistor under the control of the data terminal, the first control terminal, the sensing signal terminal, and the second control terminal; and the mobility compensation unit and the light emitting control unit perform mobility compensation for the dual-gate driving transistor and control the dual-gate driving transistor to drive the light emitting device to emit light under the control of the sensing signal terminal, the second control terminal, the data terminal, and the third control terminal.
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公开(公告)号：US10210834B2
公开(公告)日：2019-02-19
申请号：US15573948
申请日：2017-05-15
Inventor： Min He , Haixia Xu , Dongxu Han , Meng Li
IPC: G11C19/00 , G09G3/36 , G11C19/28 , H03K17/284
Abstract: A gate integrated driving circuit for a display panel. The gate integrated driving circuit may comprise N reset circuits. For each of the N reset circuits, a first terminal thereof may be coupled to a reference signal terminal, a second terminal thereof may be coupled to signal output terminals of a set of input and output circuits respectively, a third terminal thereof may be coupled to control terminals of driving circuits of the set of input and output circuits respectively, and a fourth terminal thereof may be coupled to a clock signal terminal coupled to input terminals of the driving circuits of the set of input and output circuits respectively. N may be an integer of at least 3. The set of input and output circuits may contain two or more input and output circuits.
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100.发明申请公开(公告)号：US20180286342A1
公开(公告)日：2018-10-04
申请号：US15792603
申请日：2017-10-24
Abstract: The present disclosure provides a shift register and a driving method thereof, a gate driving circuit, and a display apparatus. The shift register comprises an input circuit, a first output circuit, a second output circuit, and a negative voltage switching circuit. The input circuit has an input terminal configured to receive an input signal, an output terminal coupled to a first node, and a control terminal configured to receive a first clock signal. The first output circuit has an input terminal configured to receive a second clock signal, an output terminal coupled to an output signal terminal, and a control terminal coupled to the first node. The second output circuit has an input terminal configured to receive a first low level signal, an output terminal coupled to the output signal terminal, and a control terminal configured to receive a third clock signal. The negative voltage switching circuit has an input terminal configured to receive a second low level signal, an output terminal coupled to the first node, and a control terminal configured to receive a fourth clock signal.
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