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公开(公告)号：US08629792B2
公开(公告)日：2014-01-14
申请号：US13137621
申请日：2011-08-30
申请人： Tomoya Katsuki , Shinichirou Saitou
发明人： Tomoya Katsuki , Shinichirou Saitou
IPC分类号： H03M1/00
CPC分类号： H03M1/1076 , H03M1/1225
摘要： An electric device includes first, second and third selectors. A first node connects to a first input of the first selector, a second node connects to a first input of the second selector, a third node connects to a second input of the first selector, and a fourth node connects to a second input of the second selector. A first switch connects to the first node, and a second switch connects to the second node. A first capacitor connects between the first switch and the third node, and a second capacitor connects between the second switch and the fourth node. A fifth node connects between an output of the first selector and a first input of the third selector, and a sixth node connects between an output of the second selector and a second input of the third selector. An A/D converter connects to an output of the third selector.
摘要翻译： 电气设备包括第一，第二和第三选择器。 第一节点连接到第一选择器的第一输入端，第二节点连接到第二选择器的第一输入端，第三节点连接到第一选择器的第二输入端，第四节点连接到第二选择器的第二输入端 第二选择器。 第一交换机连接到第一节点，第二交换机连接到第二节点。 第一电容器连接在第一开关和第三节点之间，第二电容器连接在第二开关和第四节点之间。 第五节点连接在第一选择器的输出端和第三选择器的第一输入端之间，第六节点连接在第二选择器的输出端和第三选择器的第二输入端之间。 A / D转换器连接到第三选择器的输出。
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公开(公告)号：US20100283644A1
公开(公告)日：2010-11-11
申请号：US12662711
申请日：2010-04-29
申请人： Tomoya Katsuki , Shinichirou Saitou
发明人： Tomoya Katsuki , Shinichirou Saitou
CPC分类号： H03M1/1076 , H03M1/1225
摘要： An A/D conversion circuit includes a plurality of transmission paths that transmit signal voltages and reference voltages, and an A/D conversion unit that A/D converts voltages output from the transmission paths. Each of the plurality of transmission paths includes a first switch that selectively outputs one of the signal voltage and the reference voltage, an S/H circuit that holds output voltage from the first switch, and a second switch that selectively outputs one of the output voltage from the first switch and output voltage from the S/H circuit.
摘要翻译： A / D转换电路包括发送信号电压和参考电压的多个传输路径，以及A / D转换单元，A / D转换从传输路径输出的电压。 多个传输路径中的每一个包括选择性地输出信号电压和参考电压之一的第一开关，保持来自第一开关的输出电压的S / H电路和选择性地输出输出电压之一的第二开关 来自S / H电路的第一个开关和输出电压。
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公开(公告)号：US20120013497A1
公开(公告)日：2012-01-19
申请号：US13137621
申请日：2011-08-30
申请人： Tomoya Katsuki , Shinichirou Saitou
发明人： Tomoya Katsuki , Shinichirou Saitou
IPC分类号： H03M1/12
CPC分类号： H03M1/1076 , H03M1/1225
摘要： An electric device includes first, second and third selectors. A first node connects to a first input of the first selector, a second node connects to a first input of the second selector, a third node connects to a second input of the first selector, and a fourth node connects to a second input of the second selector. A first switch connects to the first node, and a second switch connects to the second node. A first capacitor connects between the first switch and the third node, and a second capacitor connects between the second switch and the fourth node. A fifth node connects between an output of the first selector and a first input of the third selector, and a sixth node connects between an output of the second selector and a second input of the third selector. An A/D converter connects to an output of the third selector.
摘要翻译： 电气设备包括第一，第二和第三选择器。 第一节点连接到第一选择器的第一输入端，第二节点连接到第二选择器的第一输入端，第三节点连接到第一选择器的第二输入端，第四节点连接到第二选择器的第二输入端 第二选择器。 第一交换机连接到第一节点，第二交换机连接到第二节点。 第一电容器连接在第一开关和第三节点之间，第二电容器连接在第二开关和第四节点之间。 第五节点连接在第一选择器的输出端和第三选择器的第一输入端之间，第六节点连接在第二选择器的输出端和第三选择器的第二输入端之间。 A / D转换器连接到第三选择器的输出。
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公开(公告)号：US08018362B2
公开(公告)日：2011-09-13
申请号：US12662711
申请日：2010-04-29
申请人： Tomoya Katsuki , Shinichirou Saitou
发明人： Tomoya Katsuki , Shinichirou Saitou
IPC分类号： H03M1/00
CPC分类号： H03M1/1076 , H03M1/1225
摘要： An A/D conversion circuit includes a plurality of transmission paths that transmit signal voltages and reference voltages, and an A/D conversion unit that A/D converts voltages output from the transmission paths. Each of the plurality of transmission paths includes a first switch that selectively outputs one of the signal voltage and the reference voltage, an S/H circuit that holds output voltage from the first switch, and a second switch that selectively outputs one of the output voltage from the first switch and output voltage from the S/H circuit.
摘要翻译： A / D转换电路包括发送信号电压和参考电压的多个传输路径，以及A / D转换单元，A / D转换从传输路径输出的电压。 多个传输路径中的每一个包括选择性地输出信号电压和参考电压之一的第一开关，保持来自第一开关的输出电压的S / H电路和选择性地输出输出电压之一的第二开关 来自S / H电路的第一个开关和输出电压。
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公开(公告)号：US20110285429A1
公开(公告)日：2011-11-24
申请号：US13067176
申请日：2011-05-13
申请人： Yosuke Kawanaka , Seiya Indo , Tomoya Katsuki , Shinichi Nakatsu , Kimiharu Eto , Hirotaka Shimoda , Kuniyasu Ishihara , Yuusuke Urakawa , Yuusuke Sakaguchi , Shingo Furuta
发明人： Yosuke Kawanaka , Seiya Indo , Tomoya Katsuki , Shinichi Nakatsu , Kimiharu Eto , Hirotaka Shimoda , Kuniyasu Ishihara , Yuusuke Urakawa , Yuusuke Sakaguchi , Shingo Furuta
IPC分类号： H03L7/24
CPC分类号： G06F1/10 , G06F1/3203 , G06F1/3243 , Y02D10/152
摘要： A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.
摘要翻译： 微控制器包括：数据输入单元，其接收输入数据，并在接收到输入数据时根据输入数据输出开始请求信号; 根据起始请求信号启动的振荡器，以产生时钟信号; 时钟信号供给控制单元，其将从数据输入单元提供的开始请求信号输出到振荡器，并将从起动后产生的振荡器提供的时钟信号作为第一时钟信号和作为操作时钟信号的第二时钟信号 的数据输入单元; 以及CPU，其操作第二时钟信号作为操作时钟，并且当第二时钟信号被操作时，根据输入数据执行处理。
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公开(公告)号：US07250740B2
公开(公告)日：2007-07-31
申请号：US11097208
申请日：2005-04-04
申请人： Tomoya Katsuki , Masashi Tsubota
发明人： Tomoya Katsuki , Masashi Tsubota
IPC分类号： H02P27/04
CPC分类号： H02P27/08 , H02M7/53873
摘要： In a method of generating pulse-width modulated waveform, the cycle of a carrier wave for the waveform is determined together with a first dead time value and a second dead time value both of which are set in a plurality of up-down counters, respectively. Using the plurality of the up-down counters is effective to assign individual dead times to upper and lower arms and to linearly control a PWM duty from 0% to 100%.
摘要翻译： 在产生脉冲宽度调制波形的方法中，波形的载波的周期与第一死区时间值和第二死区时间值一起确定，两者都分别设置在多个递增计数器中 。 使用多个上下计数器有效地将单个死区时间分配给上臂和下臂，并将PWM占空比线性控制从0％到100％。
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公开(公告)号：US08751842B2
公开(公告)日：2014-06-10
申请号：US13067176
申请日：2011-05-13
申请人： Yosuke Kawanaka , Seiya Indo , Tomoya Katsuki , Shinichi Nakatsu , Kimiharu Eto , Hirotaka Shimoda , Kuniyasu Ishihara , Yuusuke Urakawa , Yuusuke Sakaguchi , Shingo Furuta
发明人： Yosuke Kawanaka , Seiya Indo , Tomoya Katsuki , Shinichi Nakatsu , Kimiharu Eto , Hirotaka Shimoda , Kuniyasu Ishihara , Yuusuke Urakawa , Yuusuke Sakaguchi , Shingo Furuta
IPC分类号： G06F1/32
CPC分类号： G06F1/10 , G06F1/3203 , G06F1/3243 , Y02D10/152
摘要： A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.
摘要翻译： 微控制器包括：数据输入单元，其接收输入数据，并在接收到输入数据时根据输入数据输出开始请求信号; 根据起始请求信号启动的振荡器，以产生时钟信号; 时钟信号供给控制单元，其将从数据输入单元提供的开始请求信号输出到振荡器，并将从起动后产生的振荡器提供的时钟信号作为第一时钟信号和作为操作时钟信号的第二时钟信号 的数据输入单元; 以及CPU，其操作第二时钟信号作为操作时钟，并且当第二时钟信号被操作时，根据输入数据执行处理。
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公开(公告)号：US20050190005A1
公开(公告)日：2005-09-01
申请号：US11097208
申请日：2005-04-04
申请人： Tomoya Katsuki , Masashi Tsubota
发明人： Tomoya Katsuki , Masashi Tsubota
CPC分类号： H02P27/08 , H02M7/53873
摘要： In a method of generating pulse-width modulated waveform, the cycle of a carrier wave for the waveform is determined together with a first dead time value and a second dead time value both of which are set in a plurality of up-down counters, respectively. Using the plurality of the up-down counters is effective to assign individual dead times to upper and lower arms and to linearly control a PWM duty from 0% to 100%.
摘要翻译： 在产生脉冲宽度调制波形的方法中，波形的载波的周期与第一死区时间值和第二死区时间值一起确定，两者都分别设置在多个递增计数器中 。 使用多个上下计数器有效地将单个死区时间分配给上臂和下臂，并将PWM占空比线性控制从0％到100％。
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