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公开(公告)号：US08810993B2
公开(公告)日：2014-08-19
申请号：US14021841
申请日：2013-09-09
发明人： Yuji Hoshi , Masataka Watabe , Motoki Kobayashi
摘要： In a laminated capacitor, one additional first internal electrode layer, which has its edge connected to the first external electrode as do the first internal electrode layers, is provided to one of the five first internal electrode layers so as to face one another via the second dielectric layer having a thickness smaller than the thickness of the first dielectric layer and not contributing to the formation of capacity, and one additional second internal electrode layer, which has its edge connected to the second external electrode as do the second internal electrode layers, is provided to one of the five second internal electrode layers so as to face one another via the third dielectric layer having a thickness smaller than the thickness of the first dielectric layer and not contributing to the formation of capacity.
摘要翻译： 在叠层电容器中，与第一内部电极层一样，其边缘与第一外部电极连接的第一内部电极层设置在五个第一内部电极层中的一个上，以便经由第二内部电极层 电介质层的厚度小于第一电介质层的厚度，并且不有助于形成电容;以及附加的第二内部电极层，其第二内部电极层的边缘与第二内部电极层一样连接到第二外部电极，是 提供给五个第二内部电极层中的一个，以便经由第三电介质层彼此面对，其厚度小于第一介电层的厚度，并且不会有助于形成容量。
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公开(公告)号：US20140003014A1
公开(公告)日：2014-01-02
申请号：US13922409
申请日：2013-06-20
发明人： Yuji Hoshi , Masataka Watabe , Motoki Kobayashi , Shota Yajima
IPC分类号： H05K1/18
CPC分类号： H05K1/181 , H05K3/3442 , H05K2201/09381 , H05K2201/10636 , Y02P70/611 , Y02P70/613
摘要： A mounting structure of a chip component includes a chip component that is bonded by having a pair of external terminal electrodes provided on both ends of an element body of the thin chip component bonded to a pair of lands respectively through solder, the pair of lands being provided on an attaching substrate in a lateral direction with respect to each other. Where plan view distances from ends of the external terminal electrodes at the ridge lines formed between the surfaces and side faces of the element body of the chip component to the edges of the lands connected to the external terminal electrodes are designated as “d,” and the vertical distances from the bottom surfaces of the external terminal electrodes and the lands are designated as “t,” then d≧t/tan 35° and preferably d≧t/tan 25° is fulfilled.
摘要翻译： 芯片部件的安装结构包括芯片部件，该芯片部件通过分别通过焊料将一对外部端子电极设置在分别结合到一对焊盘的薄片部件的元件主体的两端上，所述一对外部端子电极为 在相对于彼此的横向方向上设置在附接基板上。 在形成在芯片部件的元件主体的表面和侧面之间的棱线上的外部端子电极的端部到与外部端子电极连接的焊盘边缘的平面图距离被指定为“d”，并且 将外部端子电极和焊盘的底面的垂直距离设为“t”，则d> = t / tan 35°，最好d> = t / tan 25°。
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公开(公告)号：US08958213B2
公开(公告)日：2015-02-17
申请号：US13922409
申请日：2013-06-20
发明人： Yuji Hoshi , Masataka Watabe , Motoki Kobayashi , Shota Yajima
CPC分类号： H05K1/181 , H05K3/3442 , H05K2201/09381 , H05K2201/10636 , Y02P70/611 , Y02P70/613
摘要： A mounting structure of a chip component includes a chip component that is bonded by having a pair of external terminal electrodes provided on both ends of an element body of the thin chip component bonded to a pair of lands respectively through solder, the pair of lands being provided on an attaching substrate in a lateral direction with respect to each other. Where plan view distances from ends of the external terminal electrodes at the ridge lines formed between the surfaces and side faces of the element body of the chip component to the edges of the lands connected to the external terminal electrodes are designated as “d,” and the vertical distances from the bottom surfaces of the external terminal electrodes and the lands are designated as “t,” then d>t/tan 35° and preferably d>t/tan 25° is fulfilled.
摘要翻译： 芯片部件的安装结构包括芯片部件，该芯片部件通过分别通过焊料将一对外部端子电极设置在分别结合到一对焊盘的薄片部件的元件主体的两端上，所述一对外部端子电极是 在相对于彼此的横向方向上设置在附接基板上。 在形成在芯片部件的元件主体的表面和侧面之间的棱线上的外部端子电极的端部到与外部端子电极连接的焊盘边缘的平面图距离被指定为“d”，并且 将外部端子电极和焊盘的底面的垂直距离设为“t”，则d> t / tan 35°，最好d> t / tan 25°。
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