公开(公告)号：US20210152161A1

公开(公告)日：2021-05-20

申请号：US16930658

申请日：2020-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongwoo KIM ,  Minsu KIM ,  Yonggeol KIM ,  Hyun LEE ,  Hyunchul HWANG

IPC: H03K3/037 ,  H03K19/00

Abstract: A flip-flop includes an input switching circuit configured to output an intermediate signal based on an input signal and at least one of a phase of a clock signal or a phase of an inverted clock signal, the phase of the inverted clock signal being opposite to the phase of the clock signal, and block application of a driving voltage to at least one circuit element of the input switching circuit in response to receiving a reset signal representing a reset operation of the flip-flop, and a latch circuit configured to generate an output signal based on the intermediate signal according to the at least one of the phase of the clock signal or the phase of the inverted clock signal.

公开(公告)号：US20230084175A1

公开(公告)日：2023-03-16

申请号：US17983929

申请日：2022-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongwoo KIM ,  Minsu KIM ,  Yonggeol KIM ,  Hyun LEE ,  Hyunchul HWANG

IPC: H03K3/037 ,  H03K19/00 ,  H03K3/3562

Abstract: A flip-flop includes an input switching circuit configured to output an intermediate signal based on an input signal and at least one of a phase of a clock signal or a phase of an inverted clock signal, the phase of the inverted clock signal being opposite to the phase of the clock signal, and block application of a driving voltage to at least one circuit element of the input switching circuit in response to receiving a reset signal representing a reset operation of the flip-flop, and a latch circuit configured to generate an output signal based on the intermediate signal according to the at least one of the phase of the clock signal or the phase of the inverted clock signal.