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公开(公告)号:US10073732B2
公开(公告)日:2018-09-11
申请号:US15440591
申请日:2017-02-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: DuckJoo Lee , Yong-Taek Jeong
IPC: G06F11/10
CPC classification number: G06F11/1016
Abstract: An object storage system includes a plurality of memory devices; and a memory controller configured to, receive a value and a key from a host, the key identifying the received value, store data corresponding to the received value in the plurality of memory devices, generate, based on the received value, a parity for detecting an error of the stored data, manage key-value mapping information that identifies a correspondence relationship between the received value and the key, and manage the parity in the key-value mapping information such that the parity corresponds to the received value and the key.
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公开(公告)号:US10031678B2
公开(公告)日:2018-07-24
申请号:US14966738
申请日:2015-12-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yong-Taek Jeong
Abstract: An operation method of a data storage system including storage devices includes transmitting a packet to a host including information indicating whether the storage devices are capable of resource sharing; transmitting ID information of the storage devices capable of resource to the host; transmitting by a requesting device among the capable storage devices a resource sharing request message to the remaining storage devices capable of resource sharing; and performing the resource sharing on at least one of the remaining storage devices.
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公开(公告)号:US10440112B2
公开(公告)日:2019-10-08
申请号:US15254400
申请日:2016-09-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonho Baek , Hanjoon Kim , Jeonguk Kang , Dong-Uk Kim , Seungjun Yang , DuckJoo Lee , JinHo Yi , Yong-Taek Jeong , Sangyeun Cho
Abstract: A server device includes a plurality of interface circuits configured to connect with a network, and perform format conversion between network packets and data chunks, the network packets being packets communicated with the network, the data chunks complying with an internal format; a plurality of memory modules operating independently of each other; and a switch circuit connected between the plurality of interface circuits and the plurality of memory modules, the switch circuit being configured to select at least one memory module from among the plurality of memory modules based on an attribute of a first data chunk transmitted from the plurality of interface circuits and, send the first data chunk to the selected memory module, wherein the selected at least one memory module is configured to, decode the first data chunk, and perform a read or write operation associated with the first data chunk based on the decoding result.
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