公开(公告)号：US20130267066A1

公开(公告)日：2013-10-10

申请号：US13909628

申请日：2013-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangwook Park ,  Jonggi Lee ,  Wonchul Lim

IPC: H01L23/00

CPC classification number: H01L24/03 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/20 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83143 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2924/00

Abstract: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip having a bonding pad, a metal line electrically connected to the semiconductor chip and having a terminal contacting an external terminal, an insulation layer covering the metal line and having an opening that defines the terminal, and a molding layer molding the semiconductor chip, wherein the molding layer includes a recess pattern exposing the bonding pad and extending from the bonding pad to the terminal, and the metal line is embedded in the recess pattern to contact the bonding pad.

Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括具有接合焊盘的半导体芯片，与半导体芯片电连接并具有与外部端子接触的端子的金属线，覆盖金属线并具有限定端子的开口的绝缘层，以及模制层 模制所述半导体芯片，其中所述模制层包括暴露所述焊盘并从所述焊盘延伸到所述端子的凹陷图案，并且所述金属线嵌入所述凹槽图案中以接触所述焊盘。

公开(公告)号：US08921163B2

公开(公告)日：2014-12-30

申请号：US13909628

申请日：2013-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook Park ,  Jonggi Lee ,  Wonchul Lim

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L24/03 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/20 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83143 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2924/00

Abstract: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip having a bonding pad, a metal line electrically connected to the semiconductor chip and having a terminal contacting an external terminal, an insulation layer covering the metal line and having an opening that defines the terminal, and a molding layer molding the semiconductor chip, wherein the molding layer includes a recess pattern exposing the bonding pad and extending from the bonding pad to the terminal, and the metal line is embedded in the recess pattern to contact the bonding pad.

Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括具有接合焊盘的半导体芯片，与半导体芯片电连接并具有与外部端子接触的端子的金属线，覆盖金属线并具有限定端子的开口的绝缘层，以及模制层 模制所述半导体芯片，其中所述模制层包括暴露所述焊盘并从所述焊盘延伸到所述端子的凹陷图案，并且所述金属线嵌入所述凹槽图案中以接触所述焊盘。