公开(公告)号：US20200161301A1

公开(公告)日：2020-05-21

申请号：US16726322

申请日：2019-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/092 ,  H01L21/762 ,  H01L21/8238 ,  G11C11/408

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

公开(公告)号：US11594538B2

公开(公告)日：2023-02-28

申请号：US17469340

申请日：2021-09-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Ho Lee ,  Eun A Kim ,  Ki Seok Lee ,  Jay-Bok Choi ,  Keun Nam Kim ,  Yong Seok Ahn ,  Jin-Hwan Chun ,  Sang Yeon Han ,  Sung Hee Han ,  Seung Uk Han ,  Yoo Sang Hwang

IPC: H01L21/00 ,  H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.

公开(公告)号：US10916543B2

公开(公告)日：2021-02-09

申请号：US16726322

申请日：2019-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/762 ,  G11C11/408 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  G11C11/4097 ,  H01L27/02

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

公开(公告)号：US11121134B2

公开(公告)日：2021-09-14

申请号：US16860276

申请日：2020-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Ho Lee ,  Eun A Kim ,  Ki Seok Lee ,  Jay-Bok Choi ,  Keun Nam Kim ,  Yong Seok Ahn ,  Jin-Hwan Chun ,  Sang Yeon Han ,  Sung Hee Han ,  Seung Uk Han ,  Yoo Sang Hwang

IPC: H01L21/00 ,  H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.

公开(公告)号：US10515962B2

公开(公告)日：2019-12-24

申请号：US15827231

申请日：2017-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/092 ,  G11C11/408 ,  H01L21/762 ,  H01L21/8238 ,  H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L27/02 ,  G11C11/4097

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.

公开(公告)号：US20180294264A1

公开(公告)日：2018-10-11

申请号：US15827231

申请日：2017-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Uk Han ,  Taek Yong Kim ,  Satoru Yamada ,  Jun Hee Lim ,  Ki Jae Hur

IPC: H01L27/092 ,  H01L21/8238 ,  H01L21/762

Abstract: A semiconductor device includes first and second active regions extending in a first direction on a substrate and spaced apart from each other in a second direction intersecting the first direction, wherein the first and second active regions overlaps with each other in the second direction, a third active region extending in the first direction on the substrate and spaced apart from the first active region in the second direction. The first active region is positioned between the second and third active regions in the second direction. The first and third active regions partially overlap in the second direction, and a device isolation film is configured to define the first to third active regions.