公开(公告)号：US20170017399A1

公开(公告)日：2017-01-19

申请号：US14932953

申请日：2015-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hongzhong ZHENG ,  SUHAS ,  Chaohong HU

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/064 ,  G06F3/0673 ,  G06F13/16

Abstract: An embodiment includes a module, comprising: a memory bus interface; circuitry; and a controller coupled to the memory bus interface and the circuitry, and configured to: collect meta-data associated with the circuitry; and enable access to the meta-data in response to a memory access received through the memory bus interface.

Abstract translation: 实施例包括模块，包括：存储器总线接口; 电路; 以及控制器，其耦合到所述存储器总线接口和所述电路，并且被配置为：收集与所述电路相关联的元数据; 并且响应于通过存储器总线接口接收到的存储器访问而允许访问元数据。

公开(公告)号：US20170212708A1

公开(公告)日：2017-07-27

申请号：US15133205

申请日：2016-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： SUHAS ,  Ashwini BATRAHALLI ,  Tameesh SURI

IPC: G06F3/06 ,  H04L29/08

CPC classification number: G06F3/0652 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0679 ,  H04L67/1097

Abstract: A Solid State Drive (SSD) (110) is disclosed. The SSD (110) may include storage (218) for data, and reception circuitry (203) to receive various instructions and data. The reception circuitry (203) may receive an instruction (257) from a host machine (105) to perform garbage collection, along with a selected P/E strategy (260). The SSD (110) may include garbage collection logic (209) to perform garbage collection, possibly with a delayed Program operation if an adaptive P/E strategy (1110) is selected. The SSD (110) may also include a mapping table (221) that may identify which pages were not Programmed before victim blocks (233, 236) were erased, and therefore require replication during a delayed Program operation.

公开(公告)号：US20180113621A1

公开(公告)日：2018-04-26

申请号：US15847916

申请日：2017-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hongzhong ZHENG ,  SUHAS ,  Chaohong HU

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/064 ,  G06F3/0673 ,  G06F13/16

Abstract: An embodiment includes a module, comprising: a memory bus interface; circuitry; and a controller coupled to the memory bus interface and the circuitry, and configured to: collect meta-data associated with the circuitry; and enable access to the meta-data in response to a memory access received through the memory bus interface.