SEMICONDUCTOR DEVICE
    2.
    发明公开

    公开(公告)号:US20240030305A1

    公开(公告)日:2024-01-25

    申请号:US18199133

    申请日:2023-05-18

    CPC classification number: H01L29/42392 H01L29/0673 H01L29/775 H01L29/78696

    Abstract: The present disclosure provides for semiconductor devices including field effect transistors. In some embodiments, the semiconductor device includes active structures extending in a first direction on a substrate, an isolation pattern formed in a trench between the active structures, gate structures extending in a second direction across the active structures, a cutting insulation pattern formed between end portions of the gate structures in the second direction, and a lower impurity region at an upper portion of the isolation pattern. A first shape of a lower portion of the cutting insulation pattern disposed under an uppermost surface of the isolation pattern is different from a second shape of a lower portion of the gate structures disposed under the uppermost surface of the isolation pattern. The gate structures are formed on the active structures and the isolation pattern. The lower impurity region contacts at least a portion of the cutting insulation pattern.

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