公开(公告)号：US20210202462A1

公开(公告)日：2021-07-01

申请号：US17204225

申请日：2021-03-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JICHUL KIM ,  CHAJEA JO ,  SANG-UK HAN ,  KYOUNG SOON CHO ,  JAE CHOON KIM ,  WOOHYUN PARK

IPC: H01L25/18 ,  H01L27/146 ,  H01L23/00 ,  H01L25/00 ,  H01L23/367 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.

公开(公告)号：US20190287951A1

公开(公告)日：2019-09-19

申请号：US16430428

申请日：2019-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： JICHUL KIM ,  Jae Choon KIM ,  HANSUNG RYU ,  KyongSoon CHO ,  YoungSang CHO ,  Yeo-Hoon YOON

IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L23/538

Abstract: A semiconductor package is provided which includes a redistribution substrate, an interconnect substrate on the redistribution substrate, a metal layer on the semiconductor chip, a semiconductor chip on the redistribution substrate and in the hole of the interconnect substrate, and a mold layer in a gap between the semiconductor chip and the interconnect substrate. The interconnect substrate includes a hole penetrating thereinside. The interconnect substrate includes base layers and a conductive member extending through the base layers. A top surface of the interconnect substrate is positioned either above or below the level of the top surface of the metal layer.

公开(公告)号：US20180301443A1

公开(公告)日：2018-10-18

申请号：US15786698

申请日：2017-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JICHUL KIM ,  CHAJEA JO ,  SANG-UK HAN ,  KYOUNG SOON CHO ,  JAE CHOON KIM ,  WOOHYUN PARK

IPC: H01L25/18 ,  H01L27/146 ,  H01L23/00 ,  H01L23/367 ,  H01L25/00

Abstract: A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.